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USB: xhci: Set correct max packet size for HS/FS control endpoints.
Set the max packet size for the default control endpoint on high speed devices to be 64 bytes. High speed devices always have a max packet size of 64 bytes. There's no use setting it to eight for the initial 8 byte descriptor fetch and then issuing (and waiting for) an evaluate context command to update it to 64 bytes for the subsequent control transfers. The USB core guesses that the max packet size on a full speed control endpoint is 64 bytes, and then updates it after the first 8-byte descriptor fetch. Change the initial setup for the xHCI internal representation of the full speed device to have a 64 byte max packet size. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Cc: stable <stable@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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1 changed files with 18 additions and 5 deletions
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@ -401,15 +401,28 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
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/* Step 5 */
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ep0_ctx->ep_info2 = EP_TYPE(CTRL_EP);
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/*
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* See section 4.3 bullet 6:
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* The default Max Packet size for ep0 is "8 bytes for a USB2
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* LS/FS/HS device or 512 bytes for a USB3 SS device"
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* XXX: Not sure about wireless USB devices.
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*/
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if (udev->speed == USB_SPEED_SUPER)
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switch (udev->speed) {
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case USB_SPEED_SUPER:
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ep0_ctx->ep_info2 |= MAX_PACKET(512);
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else
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break;
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case USB_SPEED_HIGH:
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/* USB core guesses at a 64-byte max packet first for FS devices */
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case USB_SPEED_FULL:
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ep0_ctx->ep_info2 |= MAX_PACKET(64);
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break;
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case USB_SPEED_LOW:
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ep0_ctx->ep_info2 |= MAX_PACKET(8);
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break;
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case USB_SPEED_VARIABLE:
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xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
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return -EINVAL;
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break;
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default:
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/* New speed? */
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BUG();
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}
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/* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */
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ep0_ctx->ep_info2 |= MAX_BURST(0);
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ep0_ctx->ep_info2 |= ERROR_COUNT(3);
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