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dmaengine: omap-dma: use cached CCR value when enabling DMA

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We don't need to read-modify-write the CCR register; we already know
what value it should contain at this point.  Use the cached CCR value
when setting the enable bit.

Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2013-11-06 17:18:42 +00:00
parent 5987190270
commit 45da7b0451
1 changed files with 2 additions and 4 deletions
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6
drivers/dma/omap-dma.c
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@ -181,7 +181,6 @@ static void omap_dma_clear_csr(struct omap_chan *c)
static void omap_dma_start(struct omap_chan *c, struct omap_desc *d)
{
struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device);
uint32_t val;
if (__dma_omap15xx(od->plat->dma_attr))
c->plat->dma_write(0, CPC, c->dma_ch);
@ -193,9 +192,8 @@ static void omap_dma_start(struct omap_chan *c, struct omap_desc *d)
/* Enable interrupts */
c->plat->dma_write(d->cicr, CICR, c->dma_ch);
val = c->plat->dma_read(CCR, c->dma_ch);
val |= CCR_ENABLE;
c->plat->dma_write(val, CCR, c->dma_ch);
/* Enable channel */
c->plat->dma_write(d->ccr | CCR_ENABLE, CCR, c->dma_ch);
}
static void omap_dma_stop(struct omap_chan *c)