mirror of
https://github.com/torvalds/linux
synced 2024-10-16 00:10:42 +00:00
MIPS: Alchemy: remove SOC_AU1X00 in favor of MIPS_ALCHEMY
Remove the CONFIG_SOC_AU1X00 Kconfig symbol since its job can also be done by MACH_ALCHEMY, now renamed to MIPS_ALCHEMY. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1461/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
parent
745aef5df1
commit
42a4f17dc3
|
@ -23,8 +23,17 @@ choice
|
||||||
prompt "System type"
|
prompt "System type"
|
||||||
default SGI_IP22
|
default SGI_IP22
|
||||||
|
|
||||||
config MACH_ALCHEMY
|
config MIPS_ALCHEMY
|
||||||
bool "Alchemy processor based machines"
|
bool "Alchemy processor based machines"
|
||||||
|
select 64BIT_PHYS_ADDR
|
||||||
|
select CEVT_R4K_LIB
|
||||||
|
select CSRC_R4K_LIB
|
||||||
|
select IRQ_CPU
|
||||||
|
select SYS_HAS_CPU_MIPS32_R1
|
||||||
|
select SYS_SUPPORTS_32BIT_KERNEL
|
||||||
|
select SYS_SUPPORTS_APM_EMULATION
|
||||||
|
select GENERIC_GPIO
|
||||||
|
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||||
select SYS_SUPPORTS_ZBOOT
|
select SYS_SUPPORTS_ZBOOT
|
||||||
|
|
||||||
config AR7
|
config AR7
|
||||||
|
|
|
@ -11,7 +11,7 @@ config ALCHEMY_GPIO_INDIRECT
|
||||||
|
|
||||||
choice
|
choice
|
||||||
prompt "Machine type"
|
prompt "Machine type"
|
||||||
depends on MACH_ALCHEMY
|
depends on MIPS_ALCHEMY
|
||||||
default MIPS_DB1000
|
default MIPS_DB1000
|
||||||
|
|
||||||
config MIPS_MTX1
|
config MIPS_MTX1
|
||||||
|
@ -132,37 +132,20 @@ endchoice
|
||||||
|
|
||||||
config SOC_AU1000
|
config SOC_AU1000
|
||||||
bool
|
bool
|
||||||
select SOC_AU1X00
|
|
||||||
select ALCHEMY_GPIOINT_AU1000
|
select ALCHEMY_GPIOINT_AU1000
|
||||||
|
|
||||||
config SOC_AU1100
|
config SOC_AU1100
|
||||||
bool
|
bool
|
||||||
select SOC_AU1X00
|
|
||||||
select ALCHEMY_GPIOINT_AU1000
|
select ALCHEMY_GPIOINT_AU1000
|
||||||
|
|
||||||
config SOC_AU1500
|
config SOC_AU1500
|
||||||
bool
|
bool
|
||||||
select SOC_AU1X00
|
|
||||||
select ALCHEMY_GPIOINT_AU1000
|
select ALCHEMY_GPIOINT_AU1000
|
||||||
|
|
||||||
config SOC_AU1550
|
config SOC_AU1550
|
||||||
bool
|
bool
|
||||||
select SOC_AU1X00
|
|
||||||
select ALCHEMY_GPIOINT_AU1000
|
select ALCHEMY_GPIOINT_AU1000
|
||||||
|
|
||||||
config SOC_AU1200
|
config SOC_AU1200
|
||||||
bool
|
bool
|
||||||
select SOC_AU1X00
|
|
||||||
select ALCHEMY_GPIOINT_AU1000
|
select ALCHEMY_GPIOINT_AU1000
|
||||||
|
|
||||||
config SOC_AU1X00
|
|
||||||
bool
|
|
||||||
select 64BIT_PHYS_ADDR
|
|
||||||
select CEVT_R4K_LIB
|
|
||||||
select CSRC_R4K_LIB
|
|
||||||
select IRQ_CPU
|
|
||||||
select SYS_HAS_CPU_MIPS32_R1
|
|
||||||
select SYS_SUPPORTS_32BIT_KERNEL
|
|
||||||
select SYS_SUPPORTS_APM_EMULATION
|
|
||||||
select GENERIC_GPIO
|
|
||||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
#
|
#
|
||||||
# Core Alchemy code
|
# Core Alchemy code
|
||||||
#
|
#
|
||||||
platform-$(CONFIG_MACH_ALCHEMY) += alchemy/common/
|
platform-$(CONFIG_MIPS_ALCHEMY) += alchemy/common/
|
||||||
|
|
||||||
|
|
||||||
#
|
#
|
||||||
|
@ -106,4 +106,4 @@ load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
|
||||||
# compiler picks the board one. If they don't, it will make sure
|
# compiler picks the board one. If they don't, it will make sure
|
||||||
# the alchemy generic gpio header is picked up.
|
# the alchemy generic gpio header is picked up.
|
||||||
|
|
||||||
cflags-$(CONFIG_MACH_ALCHEMY) += -I$(srctree)/arch/mips/include/asm/mach-au1x00
|
cflags-$(CONFIG_MIPS_ALCHEMY) += -I$(srctree)/arch/mips/include/asm/mach-au1x00
|
||||||
|
|
|
@ -40,7 +40,7 @@ vmlinuzobjs-y := $(obj)/head.o $(obj)/decompress.o $(obj)/dbg.o
|
||||||
|
|
||||||
ifdef CONFIG_DEBUG_ZBOOT
|
ifdef CONFIG_DEBUG_ZBOOT
|
||||||
vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o
|
vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o
|
||||||
vmlinuzobjs-$(CONFIG_MACH_ALCHEMY) += $(obj)/uart-alchemy.o
|
vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY) += $(obj)/uart-alchemy.o
|
||||||
endif
|
endif
|
||||||
|
|
||||||
targets += vmlinux.bin
|
targets += vmlinux.bin
|
||||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_MIPS=y
|
||||||
#
|
#
|
||||||
# Machine selection
|
# Machine selection
|
||||||
#
|
#
|
||||||
CONFIG_MACH_ALCHEMY=y
|
CONFIG_MIPS_ALCHEMY=y
|
||||||
# CONFIG_AR7 is not set
|
# CONFIG_AR7 is not set
|
||||||
# CONFIG_BCM47XX is not set
|
# CONFIG_BCM47XX is not set
|
||||||
# CONFIG_BCM63XX is not set
|
# CONFIG_BCM63XX is not set
|
||||||
|
@ -64,7 +64,6 @@ CONFIG_MIPS_DB1000=y
|
||||||
# CONFIG_MIPS_PB1550 is not set
|
# CONFIG_MIPS_PB1550 is not set
|
||||||
# CONFIG_MIPS_XXS1500 is not set
|
# CONFIG_MIPS_XXS1500 is not set
|
||||||
CONFIG_SOC_AU1000=y
|
CONFIG_SOC_AU1000=y
|
||||||
CONFIG_SOC_AU1X00=y
|
|
||||||
CONFIG_LOONGSON_UART_BASE=y
|
CONFIG_LOONGSON_UART_BASE=y
|
||||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_MIPS=y
|
||||||
#
|
#
|
||||||
# Machine selection
|
# Machine selection
|
||||||
#
|
#
|
||||||
CONFIG_MACH_ALCHEMY=y
|
CONFIG_MIPS_ALCHEMY=y
|
||||||
# CONFIG_AR7 is not set
|
# CONFIG_AR7 is not set
|
||||||
# CONFIG_BCM47XX is not set
|
# CONFIG_BCM47XX is not set
|
||||||
# CONFIG_BCM63XX is not set
|
# CONFIG_BCM63XX is not set
|
||||||
|
@ -64,7 +64,6 @@ CONFIG_MIPS_DB1100=y
|
||||||
# CONFIG_MIPS_PB1550 is not set
|
# CONFIG_MIPS_PB1550 is not set
|
||||||
# CONFIG_MIPS_XXS1500 is not set
|
# CONFIG_MIPS_XXS1500 is not set
|
||||||
CONFIG_SOC_AU1100=y
|
CONFIG_SOC_AU1100=y
|
||||||
CONFIG_SOC_AU1X00=y
|
|
||||||
CONFIG_LOONGSON_UART_BASE=y
|
CONFIG_LOONGSON_UART_BASE=y
|
||||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_MIPS=y
|
||||||
#
|
#
|
||||||
# Machine selection
|
# Machine selection
|
||||||
#
|
#
|
||||||
CONFIG_MACH_ALCHEMY=y
|
CONFIG_MIPS_ALCHEMY=y
|
||||||
# CONFIG_AR7 is not set
|
# CONFIG_AR7 is not set
|
||||||
# CONFIG_BCM47XX is not set
|
# CONFIG_BCM47XX is not set
|
||||||
# CONFIG_BCM63XX is not set
|
# CONFIG_BCM63XX is not set
|
||||||
|
@ -64,7 +64,6 @@ CONFIG_MIPS_DB1200=y
|
||||||
# CONFIG_MIPS_PB1550 is not set
|
# CONFIG_MIPS_PB1550 is not set
|
||||||
# CONFIG_MIPS_XXS1500 is not set
|
# CONFIG_MIPS_XXS1500 is not set
|
||||||
CONFIG_SOC_AU1200=y
|
CONFIG_SOC_AU1200=y
|
||||||
CONFIG_SOC_AU1X00=y
|
|
||||||
CONFIG_LOONGSON_UART_BASE=y
|
CONFIG_LOONGSON_UART_BASE=y
|
||||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_MIPS=y
|
||||||
#
|
#
|
||||||
# Machine selection
|
# Machine selection
|
||||||
#
|
#
|
||||||
CONFIG_MACH_ALCHEMY=y
|
CONFIG_MIPS_ALCHEMY=y
|
||||||
# CONFIG_AR7 is not set
|
# CONFIG_AR7 is not set
|
||||||
# CONFIG_BCM47XX is not set
|
# CONFIG_BCM47XX is not set
|
||||||
# CONFIG_BCM63XX is not set
|
# CONFIG_BCM63XX is not set
|
||||||
|
@ -64,7 +64,6 @@ CONFIG_MIPS_DB1500=y
|
||||||
# CONFIG_MIPS_PB1550 is not set
|
# CONFIG_MIPS_PB1550 is not set
|
||||||
# CONFIG_MIPS_XXS1500 is not set
|
# CONFIG_MIPS_XXS1500 is not set
|
||||||
CONFIG_SOC_AU1500=y
|
CONFIG_SOC_AU1500=y
|
||||||
CONFIG_SOC_AU1X00=y
|
|
||||||
CONFIG_LOONGSON_UART_BASE=y
|
CONFIG_LOONGSON_UART_BASE=y
|
||||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_MIPS=y
|
||||||
#
|
#
|
||||||
# Machine selection
|
# Machine selection
|
||||||
#
|
#
|
||||||
CONFIG_MACH_ALCHEMY=y
|
CONFIG_MIPS_ALCHEMY=y
|
||||||
# CONFIG_AR7 is not set
|
# CONFIG_AR7 is not set
|
||||||
# CONFIG_BCM47XX is not set
|
# CONFIG_BCM47XX is not set
|
||||||
# CONFIG_BCM63XX is not set
|
# CONFIG_BCM63XX is not set
|
||||||
|
@ -64,7 +64,6 @@ CONFIG_MIPS_DB1550=y
|
||||||
# CONFIG_MIPS_PB1550 is not set
|
# CONFIG_MIPS_PB1550 is not set
|
||||||
# CONFIG_MIPS_XXS1500 is not set
|
# CONFIG_MIPS_XXS1500 is not set
|
||||||
CONFIG_SOC_AU1550=y
|
CONFIG_SOC_AU1550=y
|
||||||
CONFIG_SOC_AU1X00=y
|
|
||||||
CONFIG_LOONGSON_UART_BASE=y
|
CONFIG_LOONGSON_UART_BASE=y
|
||||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_MIPS=y
|
||||||
#
|
#
|
||||||
# Machine selection
|
# Machine selection
|
||||||
#
|
#
|
||||||
CONFIG_MACH_ALCHEMY=y
|
CONFIG_MIPS_ALCHEMY=y
|
||||||
# CONFIG_AR7 is not set
|
# CONFIG_AR7 is not set
|
||||||
# CONFIG_BCM47XX is not set
|
# CONFIG_BCM47XX is not set
|
||||||
# CONFIG_BCM63XX is not set
|
# CONFIG_BCM63XX is not set
|
||||||
|
@ -64,7 +64,6 @@ CONFIG_MIPS_MTX1=y
|
||||||
# CONFIG_MIPS_PB1550 is not set
|
# CONFIG_MIPS_PB1550 is not set
|
||||||
# CONFIG_MIPS_XXS1500 is not set
|
# CONFIG_MIPS_XXS1500 is not set
|
||||||
CONFIG_SOC_AU1500=y
|
CONFIG_SOC_AU1500=y
|
||||||
CONFIG_SOC_AU1X00=y
|
|
||||||
CONFIG_LOONGSON_UART_BASE=y
|
CONFIG_LOONGSON_UART_BASE=y
|
||||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_MIPS=y
|
||||||
#
|
#
|
||||||
# Machine selection
|
# Machine selection
|
||||||
#
|
#
|
||||||
CONFIG_MACH_ALCHEMY=y
|
CONFIG_MIPS_ALCHEMY=y
|
||||||
# CONFIG_AR7 is not set
|
# CONFIG_AR7 is not set
|
||||||
# CONFIG_BCM47XX is not set
|
# CONFIG_BCM47XX is not set
|
||||||
# CONFIG_BCM63XX is not set
|
# CONFIG_BCM63XX is not set
|
||||||
|
@ -64,7 +64,6 @@ CONFIG_MIPS_PB1100=y
|
||||||
# CONFIG_MIPS_PB1550 is not set
|
# CONFIG_MIPS_PB1550 is not set
|
||||||
# CONFIG_MIPS_XXS1500 is not set
|
# CONFIG_MIPS_XXS1500 is not set
|
||||||
CONFIG_SOC_AU1100=y
|
CONFIG_SOC_AU1100=y
|
||||||
CONFIG_SOC_AU1X00=y
|
|
||||||
CONFIG_LOONGSON_UART_BASE=y
|
CONFIG_LOONGSON_UART_BASE=y
|
||||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_MIPS=y
|
||||||
#
|
#
|
||||||
# Machine selection
|
# Machine selection
|
||||||
#
|
#
|
||||||
CONFIG_MACH_ALCHEMY=y
|
CONFIG_MIPS_ALCHEMY=y
|
||||||
# CONFIG_AR7 is not set
|
# CONFIG_AR7 is not set
|
||||||
# CONFIG_BCM47XX is not set
|
# CONFIG_BCM47XX is not set
|
||||||
# CONFIG_BCM63XX is not set
|
# CONFIG_BCM63XX is not set
|
||||||
|
@ -64,7 +64,6 @@ CONFIG_MIPS_PB1200=y
|
||||||
# CONFIG_MIPS_PB1550 is not set
|
# CONFIG_MIPS_PB1550 is not set
|
||||||
# CONFIG_MIPS_XXS1500 is not set
|
# CONFIG_MIPS_XXS1500 is not set
|
||||||
CONFIG_SOC_AU1200=y
|
CONFIG_SOC_AU1200=y
|
||||||
CONFIG_SOC_AU1X00=y
|
|
||||||
CONFIG_LOONGSON_UART_BASE=y
|
CONFIG_LOONGSON_UART_BASE=y
|
||||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_MIPS=y
|
||||||
#
|
#
|
||||||
# Machine selection
|
# Machine selection
|
||||||
#
|
#
|
||||||
CONFIG_MACH_ALCHEMY=y
|
CONFIG_MIPS_ALCHEMY=y
|
||||||
# CONFIG_AR7 is not set
|
# CONFIG_AR7 is not set
|
||||||
# CONFIG_BCM47XX is not set
|
# CONFIG_BCM47XX is not set
|
||||||
# CONFIG_BCM63XX is not set
|
# CONFIG_BCM63XX is not set
|
||||||
|
@ -64,7 +64,6 @@ CONFIG_MIPS_PB1500=y
|
||||||
# CONFIG_MIPS_PB1550 is not set
|
# CONFIG_MIPS_PB1550 is not set
|
||||||
# CONFIG_MIPS_XXS1500 is not set
|
# CONFIG_MIPS_XXS1500 is not set
|
||||||
CONFIG_SOC_AU1500=y
|
CONFIG_SOC_AU1500=y
|
||||||
CONFIG_SOC_AU1X00=y
|
|
||||||
CONFIG_LOONGSON_UART_BASE=y
|
CONFIG_LOONGSON_UART_BASE=y
|
||||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_MIPS=y
|
||||||
#
|
#
|
||||||
# Machine selection
|
# Machine selection
|
||||||
#
|
#
|
||||||
CONFIG_MACH_ALCHEMY=y
|
CONFIG_MIPS_ALCHEMY=y
|
||||||
# CONFIG_AR7 is not set
|
# CONFIG_AR7 is not set
|
||||||
# CONFIG_BCM47XX is not set
|
# CONFIG_BCM47XX is not set
|
||||||
# CONFIG_BCM63XX is not set
|
# CONFIG_BCM63XX is not set
|
||||||
|
@ -64,7 +64,6 @@ CONFIG_ALCHEMY_GPIOINT_AU1000=y
|
||||||
CONFIG_MIPS_PB1550=y
|
CONFIG_MIPS_PB1550=y
|
||||||
# CONFIG_MIPS_XXS1500 is not set
|
# CONFIG_MIPS_XXS1500 is not set
|
||||||
CONFIG_SOC_AU1550=y
|
CONFIG_SOC_AU1550=y
|
||||||
CONFIG_SOC_AU1X00=y
|
|
||||||
CONFIG_LOONGSON_UART_BASE=y
|
CONFIG_LOONGSON_UART_BASE=y
|
||||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||||
|
|
|
@ -87,7 +87,7 @@ do { \
|
||||||
: "=r" (tmp)); \
|
: "=r" (tmp)); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
#elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MACH_ALCHEMY)
|
#elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MIPS_ALCHEMY)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* These are slightly complicated by the fact that we guarantee R1 kernels to
|
* These are slightly complicated by the fact that we guarantee R1 kernels to
|
||||||
|
@ -138,7 +138,7 @@ do { \
|
||||||
__instruction_hazard(); \
|
__instruction_hazard(); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
#elif defined(CONFIG_MACH_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
|
#elif defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
|
||||||
defined(CONFIG_CPU_LOONGSON2) || defined(CONFIG_CPU_R10000) || \
|
defined(CONFIG_CPU_LOONGSON2) || defined(CONFIG_CPU_R10000) || \
|
||||||
defined(CONFIG_CPU_R5500)
|
defined(CONFIG_CPU_R5500)
|
||||||
|
|
||||||
|
|
|
@ -484,7 +484,7 @@ config XTENSA_XT2000_SONIC
|
||||||
|
|
||||||
config MIPS_AU1X00_ENET
|
config MIPS_AU1X00_ENET
|
||||||
tristate "MIPS AU1000 Ethernet support"
|
tristate "MIPS AU1000 Ethernet support"
|
||||||
depends on SOC_AU1X00
|
depends on MIPS_ALCHEMY
|
||||||
select PHYLIB
|
select PHYLIB
|
||||||
select CRC32
|
select CRC32
|
||||||
help
|
help
|
||||||
|
|
|
@ -157,11 +157,11 @@ config PCMCIA_M8XX
|
||||||
|
|
||||||
config PCMCIA_AU1X00
|
config PCMCIA_AU1X00
|
||||||
tristate "Au1x00 pcmcia support"
|
tristate "Au1x00 pcmcia support"
|
||||||
depends on SOC_AU1X00 && PCMCIA
|
depends on MIPS_ALCHEMY && PCMCIA
|
||||||
|
|
||||||
config PCMCIA_ALCHEMY_DEVBOARD
|
config PCMCIA_ALCHEMY_DEVBOARD
|
||||||
tristate "Alchemy Db/Pb1xxx PCMCIA socket services"
|
tristate "Alchemy Db/Pb1xxx PCMCIA socket services"
|
||||||
depends on SOC_AU1X00 && PCMCIA
|
depends on MIPS_ALCHEMY && PCMCIA
|
||||||
select 64BIT_PHYS_ADDR
|
select 64BIT_PHYS_ADDR
|
||||||
help
|
help
|
||||||
Enable this driver of you want PCMCIA support on your Alchemy
|
Enable this driver of you want PCMCIA support on your Alchemy
|
||||||
|
|
|
@ -774,7 +774,7 @@ config RTC_DRV_AT91SAM9_GPBR
|
||||||
|
|
||||||
config RTC_DRV_AU1XXX
|
config RTC_DRV_AU1XXX
|
||||||
tristate "Au1xxx Counter0 RTC support"
|
tristate "Au1xxx Counter0 RTC support"
|
||||||
depends on SOC_AU1X00
|
depends on MIPS_ALCHEMY
|
||||||
help
|
help
|
||||||
This is a driver for the Au1xxx on-chip Counter0 (Time-Of-Year
|
This is a driver for the Au1xxx on-chip Counter0 (Time-Of-Year
|
||||||
counter) to be used as a RTC.
|
counter) to be used as a RTC.
|
||||||
|
|
|
@ -260,7 +260,7 @@ config SERIAL_8250_ACORN
|
||||||
|
|
||||||
config SERIAL_8250_AU1X00
|
config SERIAL_8250_AU1X00
|
||||||
bool "Au1x00 serial port support"
|
bool "Au1x00 serial port support"
|
||||||
depends on SERIAL_8250 != n && SOC_AU1X00
|
depends on SERIAL_8250 != n && MIPS_ALCHEMY
|
||||||
help
|
help
|
||||||
If you have an Au1x00 SOC based board and want to use the serial port,
|
If you have an Au1x00 SOC based board and want to use the serial port,
|
||||||
say Y to this option. The driver can handle up to 4 serial ports,
|
say Y to this option. The driver can handle up to 4 serial ports,
|
||||||
|
|
|
@ -45,7 +45,7 @@ config USB_ARCH_HAS_OHCI
|
||||||
default y if STB03xxx
|
default y if STB03xxx
|
||||||
default y if PPC_MPC52xx
|
default y if PPC_MPC52xx
|
||||||
# MIPS:
|
# MIPS:
|
||||||
default y if SOC_AU1X00
|
default y if MIPS_ALCHEMY
|
||||||
# SH:
|
# SH:
|
||||||
default y if CPU_SUBTYPE_SH7720
|
default y if CPU_SUBTYPE_SH7720
|
||||||
default y if CPU_SUBTYPE_SH7721
|
default y if CPU_SUBTYPE_SH7721
|
||||||
|
|
|
@ -1031,7 +1031,7 @@ MODULE_LICENSE ("GPL");
|
||||||
#define PLATFORM_DRIVER ohci_hcd_ep93xx_driver
|
#define PLATFORM_DRIVER ohci_hcd_ep93xx_driver
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_SOC_AU1X00
|
#ifdef CONFIG_MIPS_ALCHEMY
|
||||||
#include "ohci-au1xxx.c"
|
#include "ohci-au1xxx.c"
|
||||||
#define PLATFORM_DRIVER ohci_hcd_au1xxx_driver
|
#define PLATFORM_DRIVER ohci_hcd_au1xxx_driver
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Reference in a new issue