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ARM: mach-shmobile: clock-sh7372: remove bogus pllc2 clock toggling.
The PLLC2 clock was utilizing the same sort of enable/disable without regard to usecount approach that the FSIDIV clock was when being used as a PLL pass-through. This forces the enable/disable through the clock framework, which now prevents the clock from being ripped out or modified underneath users that have an existing handle on it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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parent
b16a2892b9
commit
421b446abe
2 changed files with 7 additions and 10 deletions
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@ -969,6 +969,11 @@ static int __init hdmi_init_pm_clock(void)
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goto out;
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goto out;
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}
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}
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ret = clk_enable(&sh7372_pllc2_clk);
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if (ret < 0) {
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pr_err("Cannot enable pllc2 clock\n");
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goto out;
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}
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pr_debug("PLLC2 set frequency %lu\n", rate);
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pr_debug("PLLC2 set frequency %lu\n", rate);
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ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
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ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
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@ -230,21 +230,13 @@ static int pllc2_set_rate(struct clk *clk,
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if (idx < 0)
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if (idx < 0)
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return idx;
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return idx;
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if (rate == clk->parent->rate) {
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if (rate == clk->parent->rate)
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pllc2_disable(clk);
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return -EINVAL;
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return 0;
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}
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value = __raw_readl(PLLC2CR) & ~(0x3f << 24);
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value = __raw_readl(PLLC2CR) & ~(0x3f << 24);
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if (value & 0x80000000)
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pllc2_disable(clk);
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__raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR);
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__raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR);
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if (value & 0x80000000)
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return pllc2_enable(clk);
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return 0;
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return 0;
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}
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}
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