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[MIPS] Fix some sparse warnings on traps.c and irq-msc01.c
* Declare board_bind_eic_interrupt, board_watchpoint_handler in traps.h * Make msc_bind_eic_interrupt static and fix its argument types. * Make msc_levelirq_type, msc_edgeirq_type static. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -17,6 +17,7 @@
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/msc01_ic.h>
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#include <asm/traps.h>
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static unsigned long _icctrl_msc;
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#define MSC01_IC_REG_BASE _icctrl_msc
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@ -98,14 +99,13 @@ void ll_msc_irq(void)
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}
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}
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void
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msc_bind_eic_interrupt(unsigned int irq, unsigned int set)
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static void msc_bind_eic_interrupt(int irq, int set)
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{
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MSCIC_WRITE(MSC01_IC_RAMW,
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(irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF));
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}
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struct irq_chip msc_levelirq_type = {
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static struct irq_chip msc_levelirq_type = {
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.name = "SOC-it-Level",
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.ack = level_mask_and_ack_msc_irq,
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.mask = mask_msc_irq,
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@ -115,7 +115,7 @@ struct irq_chip msc_levelirq_type = {
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.end = end_msc_irq,
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};
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struct irq_chip msc_edgeirq_type = {
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static struct irq_chip msc_edgeirq_type = {
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.name = "SOC-it-Edge",
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.ack = edge_mask_and_ack_msc_irq,
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.mask = mask_msc_irq,
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@ -128,8 +128,6 @@ struct irq_chip msc_edgeirq_type = {
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void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqmap_t *imp, int nirq)
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{
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extern void (*board_bind_eic_interrupt)(unsigned int irq, unsigned int regset);
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_icctrl_msc = (unsigned long) ioremap(icubase, 0x40000);
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/* Reset interrupt controller - initialises all registers to 0 */
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@ -23,5 +23,7 @@ extern int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
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extern void (*board_nmi_handler_setup)(void);
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extern void (*board_ejtag_handler_setup)(void);
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extern void (*board_bind_eic_interrupt)(int irq, int regset);
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extern void (*board_watchpoint_handler)(struct pt_regs *regs);
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#endif /* _ASM_TRAPS_H */
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