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drm/amd: check num of link levels when update pcie param

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In SR-IOV environment, the value of pcie_table->num_of_link_levels will
be 0, and num_of_levels - 1 will cause array index out of bounds

Signed-off-by: Lin.Cao <lincao12@amd.com>
Acked-by: Jingwen Chen <Jingwen.Chen2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lin.Cao 2023-10-25 11:32:41 +08:00 committed by Alex Deucher
parent 3f69d5860f
commit 406e884535
1 changed files with 3 additions and 0 deletions
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3
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
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@ -2438,6 +2438,9 @@ int smu_v13_0_update_pcie_parameters(struct smu_context *smu,
uint32_t smu_pcie_arg;
int ret, i;
if (!num_of_levels)
return 0;
if (!(smu->adev->pm.pp_feature & PP_PCIE_DPM_MASK)) {
if (pcie_table->pcie_gen[num_of_levels - 1] < pcie_gen_cap)
pcie_gen_cap = pcie_table->pcie_gen[num_of_levels - 1];