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ARM: shmobile: r8a7779: Add helper to read mode pins
Add and use helper to read mode pins. This will be re-used when moving marzen-reference to the common clock framework. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -23,6 +23,7 @@
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/sh_clk.h>
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#include <linux/sh_clk.h>
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#include <linux/clkdev.h>
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#include <linux/clkdev.h>
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#include <mach/r8a7779.h>
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#include "clock.h"
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#include "clock.h"
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#include "common.h"
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#include "common.h"
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@ -52,9 +53,6 @@
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#define MSTPCR3 IOMEM(0xffc8003c)
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#define MSTPCR3 IOMEM(0xffc8003c)
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#define MSTPSR1 IOMEM(0xffc80044)
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#define MSTPSR1 IOMEM(0xffc80044)
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#define MODEMR 0xffcc0020
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/* ioremap() through clock mapping mandatory to avoid
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/* ioremap() through clock mapping mandatory to avoid
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* collision with ARM coherent DMA virtual memory range.
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* collision with ARM coherent DMA virtual memory range.
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*/
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*/
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@ -207,14 +205,9 @@ static struct clk_lookup lookups[] = {
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void __init r8a7779_clock_init(void)
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void __init r8a7779_clock_init(void)
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{
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{
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void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
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u32 mode = r8a7779_read_mode_pins();
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u32 mode;
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int k, ret = 0;
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int k, ret = 0;
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BUG_ON(!modemr);
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mode = ioread32(modemr);
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iounmap(modemr);
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if (mode & MD(1)) {
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if (mode & MD(1)) {
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plla_clk.rate = 1500000000;
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plla_clk.rate = 1500000000;
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@ -20,6 +20,7 @@ extern void r8a7779_add_early_devices(void);
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extern void r8a7779_add_standard_devices(void);
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extern void r8a7779_add_standard_devices(void);
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extern void r8a7779_add_standard_devices_dt(void);
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extern void r8a7779_add_standard_devices_dt(void);
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extern void r8a7779_init_late(void);
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extern void r8a7779_init_late(void);
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extern u32 r8a7779_read_mode_pins(void);
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extern void r8a7779_clock_init(void);
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extern void r8a7779_clock_init(void);
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extern void r8a7779_pinmux_init(void);
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extern void r8a7779_pinmux_init(void);
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extern void r8a7779_pm_init(void);
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extern void r8a7779_pm_init(void);
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@ -762,6 +762,24 @@ void __init r8a7779_add_standard_devices_dt(void)
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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}
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#define MODEMR 0xffcc0020
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u32 __init r8a7779_read_mode_pins(void)
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{
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static u32 mode;
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static bool mode_valid;
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if (!mode_valid) {
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void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
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BUG_ON(!modemr);
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mode = ioread32(modemr);
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iounmap(modemr);
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mode_valid = true;
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}
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return mode;
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}
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static const char *r8a7779_compat_dt[] __initdata = {
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static const char *r8a7779_compat_dt[] __initdata = {
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"renesas,r8a7779",
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"renesas,r8a7779",
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NULL,
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NULL,
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