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kbuild: make -r/-R effective in top Makefile for old Make versions
Adding -rR to MAKEFLAGS is important because we do not want to be bothered by built-in implicit rules or variables. One problem that used to exist in older GNU Make versions is MAKEFLAGS += -rR ... does not become effective in the current Makefile. When you are building with O= option, it becomes effective in the top Makefile since it recurses via 'sub-make' target. Otherwise, the top Makefile tries implicit rules. That is why we explicitly add empty rules for Makefiles, but we often miss to do that. In fact, adding -d option to older GNU Make versions shows it is trying a bunch of implicit pattern rules. Considering target file `scripts/Makefile.kcov'. Looking for an implicit rule for `scripts/Makefile.kcov'. Trying pattern rule with stem `Makefile.kcov'. Trying implicit prerequisite `scripts/Makefile.kcov.o'. Trying pattern rule with stem `Makefile.kcov'. Trying implicit prerequisite `scripts/Makefile.kcov.c'. Trying pattern rule with stem `Makefile.kcov'. Trying implicit prerequisite `scripts/Makefile.kcov.cc'. Trying pattern rule with stem `Makefile.kcov'. Trying implicit prerequisite `scripts/Makefile.kcov.C'. ... This issue was fixed by GNU Make commit 58dae243526b ("[Savannah #20501] Handle adding -r/-R to MAKEFLAGS in the makefile"). So, it is no longer a problem if you use GNU Make 4.0 or later. However, older versions are still widely used. So, I decided to patch the kernel Makefile to invoke sub-make regardless of O= option. This will allow further cleanups. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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commit
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48
Makefile
48
Makefile
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@ -15,19 +15,6 @@ NAME = Shy Crocodile
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PHONY := _all
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_all:
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# Do not use make's built-in rules and variables
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# (this increases performance and avoids hard-to-debug behaviour)
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MAKEFLAGS += -rR
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# Avoid funny character set dependencies
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unexport LC_ALL
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LC_COLLATE=C
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LC_NUMERIC=C
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export LC_COLLATE LC_NUMERIC
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# Avoid interference with shell env settings
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unexport GREP_OPTIONS
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# We are using a recursive build, so we need to do a little thinking
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# to get the ordering right.
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#
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@ -44,6 +31,21 @@ unexport GREP_OPTIONS
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# descending is started. They are now explicitly listed as the
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# prepare rule.
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ifneq ($(sub-make-done),1)
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# Do not use make's built-in rules and variables
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# (this increases performance and avoids hard-to-debug behaviour)
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MAKEFLAGS += -rR
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# Avoid funny character set dependencies
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unexport LC_ALL
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LC_COLLATE=C
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LC_NUMERIC=C
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export LC_COLLATE LC_NUMERIC
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# Avoid interference with shell env settings
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unexport GREP_OPTIONS
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# Beautify output
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# ---------------------------------------------------------------------------
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#
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@ -111,7 +113,6 @@ export quiet Q KBUILD_VERBOSE
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# KBUILD_SRC is not intended to be used by the regular user (for now),
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# it is set on invocation of make with KBUILD_OUTPUT or O= specified.
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ifeq ($(KBUILD_SRC),)
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# OK, Make called in directory where kernel src resides
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# Do we want to locate output files in a separate directory?
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@ -141,6 +142,13 @@ $(if $(KBUILD_OUTPUT),, \
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# 'sub-make' below.
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MAKEFLAGS += --include-dir=$(CURDIR)
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else
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# Do not print "Entering directory ..." at all for in-tree build.
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MAKEFLAGS += --no-print-directory
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endif # ifneq ($(KBUILD_OUTPUT),)
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PHONY += $(MAKECMDGOALS) sub-make
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$(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS)) _all: sub-make
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@ -148,16 +156,12 @@ $(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS)) _all: sub-make
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# Invoke a second make in the output directory, passing relevant variables
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sub-make:
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$(Q)$(MAKE) -C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR) \
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$(Q)$(MAKE) sub-make-done=1 \
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$(if $(KBUILD_OUTPUT),-C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR)) \
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-f $(CURDIR)/Makefile $(filter-out _all sub-make,$(MAKECMDGOALS))
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# Leave processing to above invocation of make
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skip-makefile := 1
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endif # ifneq ($(KBUILD_OUTPUT),)
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endif # ifeq ($(KBUILD_SRC),)
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else # sub-make-done
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# We process the rest of the Makefile if this is the final invocation of make
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ifeq ($(skip-makefile),)
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# Do not print "Entering directory ...",
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# but we want to display it when entering to the output directory
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@ -1762,7 +1766,7 @@ $(cmd_files): ; # Do not try to update included dependency files
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endif # ifeq ($(config-targets),1)
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endif # ifeq ($(mixed-targets),1)
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endif # skip-makefile
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endif # sub-make-done
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PHONY += FORCE
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FORCE:
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