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https://github.com/torvalds/linux
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powerpc/405: move PPC405_ERR77 in asm-405.h
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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8c58259bba
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19
arch/powerpc/include/asm/asm-405.h
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19
arch/powerpc/include/asm/asm-405.h
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@ -0,0 +1,19 @@
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#ifndef _ASM_POWERPC_ASM_405_H
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#define _ASM_POWERPC_ASM_405_H
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#include <asm/asm-const.h>
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#ifdef __KERNEL__
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#ifdef CONFIG_IBM405_ERR77
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/* Erratum #77 on the 405 means we need a sync or dcbt before every
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* stwcx. The old ATOMIC_SYNC_FIX covered some but not all of this.
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*/
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#define PPC405_ERR77(ra,rb) stringify_in_c(dcbt ra, rb;)
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#define PPC405_ERR77_SYNC stringify_in_c(sync;)
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#else
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#define PPC405_ERR77(ra,rb)
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#define PPC405_ERR77_SYNC
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#endif
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#endif
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#endif /* _ASM_POWERPC_ASM_405_H */
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@ -70,17 +70,4 @@
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#endif
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#endif
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#ifdef __KERNEL__
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#ifdef CONFIG_IBM405_ERR77
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/* Erratum #77 on the 405 means we need a sync or dcbt before every
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* stwcx. The old ATOMIC_SYNC_FIX covered some but not all of this.
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*/
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#define PPC405_ERR77(ra,rb) stringify_in_c(dcbt ra, rb;)
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#define PPC405_ERR77_SYNC stringify_in_c(sync;)
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#else
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#define PPC405_ERR77(ra,rb)
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#define PPC405_ERR77_SYNC
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#endif
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#endif
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#endif /* _ASM_POWERPC_ASM_COMPAT_H */
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#endif /* _ASM_POWERPC_ASM_COMPAT_H */
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@ -10,6 +10,7 @@
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#include <linux/types.h>
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#include <linux/types.h>
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#include <asm/cmpxchg.h>
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#include <asm/cmpxchg.h>
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#include <asm/barrier.h>
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#include <asm/barrier.h>
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#include <asm/asm-405.h>
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#define ATOMIC_INIT(i) { (i) }
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#define ATOMIC_INIT(i) { (i) }
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@ -45,6 +45,7 @@
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#include <linux/compiler.h>
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#include <linux/compiler.h>
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#include <asm/asm-compat.h>
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#include <asm/asm-compat.h>
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#include <asm/synch.h>
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#include <asm/synch.h>
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#include <asm/asm-405.h>
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/* PPC bit number conversion */
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/* PPC bit number conversion */
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#define PPC_BITLSHIFT(be) (BITS_PER_LONG - 1 - (be))
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#define PPC_BITLSHIFT(be) (BITS_PER_LONG - 1 - (be))
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@ -164,7 +164,6 @@ static inline unsigned long pte_update(pte_t *p,
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1: lwarx %0,0,%3\n\
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1: lwarx %0,0,%3\n\
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andc %1,%0,%4\n\
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andc %1,%0,%4\n\
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or %1,%1,%5\n"
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or %1,%1,%5\n"
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PPC405_ERR77(0,%3)
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" stwcx. %1,0,%3\n\
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" stwcx. %1,0,%3\n\
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bne- 1b"
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bne- 1b"
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: "=&r" (old), "=&r" (tmp), "=m" (*p)
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: "=&r" (old), "=&r" (tmp), "=m" (*p)
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@ -186,7 +185,6 @@ static inline unsigned long long pte_update(pte_t *p,
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lwzx %0,0,%3\n\
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lwzx %0,0,%3\n\
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andc %1,%L0,%5\n\
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andc %1,%L0,%5\n\
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or %1,%1,%6\n"
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or %1,%1,%6\n"
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PPC405_ERR77(0,%3)
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" stwcx. %1,0,%4\n\
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" stwcx. %1,0,%4\n\
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bne- 1b"
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bne- 1b"
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: "=&r" (old), "=&r" (tmp), "=m" (*p)
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: "=&r" (old), "=&r" (tmp), "=m" (*p)
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@ -7,6 +7,7 @@
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#include <asm/synch.h>
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#include <asm/synch.h>
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#include <asm/asm-compat.h>
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#include <asm/asm-compat.h>
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#include <linux/bug.h>
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#include <linux/bug.h>
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#include <asm/asm-405.h>
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#ifdef __BIG_ENDIAN
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#ifdef __BIG_ENDIAN
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#define BITOFF_CAL(size, off) ((sizeof(u32) - size - off) * BITS_PER_BYTE)
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#define BITOFF_CAL(size, off) ((sizeof(u32) - size - off) * BITS_PER_BYTE)
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@ -9,6 +9,7 @@
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#include <asm/errno.h>
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#include <asm/errno.h>
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#include <asm/synch.h>
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#include <asm/synch.h>
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#include <asm/asm-compat.h>
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#include <asm/asm-compat.h>
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#include <asm/asm-405.h>
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#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
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#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
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__asm__ __volatile ( \
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__asm__ __volatile ( \
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@ -9,6 +9,7 @@
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#include <linux/sched.h>
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#include <linux/sched.h>
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#include <linux/threads.h>
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#include <linux/threads.h>
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#include <asm/io.h> /* For sub-arch specific PPC_PIN_SIZE */
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#include <asm/io.h> /* For sub-arch specific PPC_PIN_SIZE */
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#include <asm/asm-405.h>
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extern unsigned long ioremap_bot;
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extern unsigned long ioremap_bot;
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@ -27,6 +27,7 @@
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#include <asm/asm-compat.h>
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#include <asm/asm-compat.h>
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#include <asm/synch.h>
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#include <asm/synch.h>
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#include <asm/ppc-opcode.h>
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#include <asm/ppc-opcode.h>
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#include <asm/asm-405.h>
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#ifdef CONFIG_PPC64
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#ifdef CONFIG_PPC64
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/* use 0x800000yy when locked, where yy == CPU number */
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/* use 0x800000yy when locked, where yy == CPU number */
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@ -33,6 +33,7 @@
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#include <asm/unistd.h>
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#include <asm/unistd.h>
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#include <asm/ptrace.h>
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#include <asm/ptrace.h>
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#include <asm/export.h>
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#include <asm/export.h>
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#include <asm/asm-405.h>
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/*
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/*
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* MSR_KERNEL is > 0x10000 on 4xx/Book-E since it include MSR_CE.
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* MSR_KERNEL is > 0x10000 on 4xx/Book-E since it include MSR_CE.
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@ -42,6 +42,7 @@
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#include <asm/asm-offsets.h>
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#include <asm/asm-offsets.h>
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#include <asm/ptrace.h>
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#include <asm/ptrace.h>
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#include <asm/export.h>
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#include <asm/export.h>
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#include <asm/asm-405.h>
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/* As with the other PowerPC ports, it is expected that when code
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/* As with the other PowerPC ports, it is expected that when code
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* execution begins here, the following registers contain valid, yet
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* execution begins here, the following registers contain valid, yet
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