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serial: mvebu-uart: initial support for Armada-3700 serial port
Armada-3700's uart is a simple serial port, which doesn't support. Configuring the modem control lines. The uart port has a 32 bytes Tx FIFO and a 64 bytes Rx FIFO The uart driver implements the uart core operations. It also support the system (early) console based on Armada-3700's serial port. Known Issue: The uart driver currently doesn't support clock programming, which means the baud-rate stays with the default value configured by the bootloader at boot time [gregory.clement@free-electrons.com: Rewrite many part which are too long to enumerate] Signed-off-by: Wilson Ding <dingwei@marvell.com> Signed-off-by: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Wilson Ding
Greg Kroah-Hartman
parent
82a3f87f6e
commit
30530791a7
6 changed files with 695 additions and 0 deletions
13
Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
Normal file
13
Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
Normal file
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@ -0,0 +1,13 @@
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* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
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Required properties:
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- compatible: "marvell,armada-3700-uart"
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- reg: offset and length of the register set for the device.
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- interrupts: device interrupt
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Example:
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serial@12000 {
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compatible = "marvell,armada-3700-uart";
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reg = <0x12000 0x400>;
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interrupts = <43>;
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};
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@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
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A valid base address must be provided, and the serial
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port must already be setup and configured.
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armada3700_uart,<addr>
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Start an early, polled-mode console on the
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Armada 3700 serial port at the specified
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address. The serial port must already be setup
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and configured. Options are not yet supported.
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earlyprintk= [X86,SH,BLACKFIN,ARM,M68k]
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earlyprintk=vga
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earlyprintk=efi
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@ -1602,6 +1602,28 @@ config SERIAL_STM32_CONSOLE
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depends on SERIAL_STM32=y
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select SERIAL_CORE_CONSOLE
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config SERIAL_MVEBU_UART
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bool "Marvell EBU serial port support"
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select SERIAL_CORE
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help
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This driver is for Marvell EBU SoC's UART. If you have a machine
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based on the Armada-3700 SoC and wish to use the on-board serial
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port,
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say 'Y' here.
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Otherwise, say 'N'.
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config SERIAL_MVEBU_CONSOLE
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bool "Console on Marvell EBU serial port"
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depends on SERIAL_MVEBU_UART
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select SERIAL_CORE_CONSOLE
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select SERIAL_EARLYCON
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default y
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help
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Say 'Y' here if you wish to use Armada-3700 UART as the system console.
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(the system console is the device which receives all kernel messages
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and warnings and which allows logins in single user mode)
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Otherwise, say 'N'.
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endmenu
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config SERIAL_MCTRL_GPIO
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@ -90,6 +90,7 @@ obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o
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obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o
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obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o
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obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
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obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
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# GPIOLIB helpers for modem control lines
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obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
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650
drivers/tty/serial/mvebu-uart.c
Normal file
650
drivers/tty/serial/mvebu-uart.c
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@ -0,0 +1,650 @@
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/*
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* ***************************************************************************
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* Copyright (C) 2015 Marvell International Ltd.
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* ***************************************************************************
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* This program is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 2 of the License, or any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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* ***************************************************************************
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*/
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#include <linux/clk.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <linux/slab.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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/* Register Map */
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#define UART_RBR 0x00
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#define RBR_BRK_DET BIT(15)
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#define RBR_FRM_ERR_DET BIT(14)
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#define RBR_PAR_ERR_DET BIT(13)
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#define RBR_OVR_ERR_DET BIT(12)
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#define UART_TSH 0x04
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#define UART_CTRL 0x08
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#define CTRL_SOFT_RST BIT(31)
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#define CTRL_TXFIFO_RST BIT(15)
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#define CTRL_RXFIFO_RST BIT(14)
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#define CTRL_ST_MIRR_EN BIT(13)
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#define CTRL_LPBK_EN BIT(12)
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#define CTRL_SND_BRK_SEQ BIT(11)
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#define CTRL_PAR_EN BIT(10)
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#define CTRL_TWO_STOP BIT(9)
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#define CTRL_TX_HFL_INT BIT(8)
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#define CTRL_RX_HFL_INT BIT(7)
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#define CTRL_TX_EMP_INT BIT(6)
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#define CTRL_TX_RDY_INT BIT(5)
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#define CTRL_RX_RDY_INT BIT(4)
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#define CTRL_BRK_DET_INT BIT(3)
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#define CTRL_FRM_ERR_INT BIT(2)
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#define CTRL_PAR_ERR_INT BIT(1)
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#define CTRL_OVR_ERR_INT BIT(0)
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#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
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CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
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#define UART_STAT 0x0c
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#define STAT_TX_FIFO_EMP BIT(13)
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#define STAT_RX_FIFO_EMP BIT(12)
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#define STAT_TX_FIFO_FUL BIT(11)
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#define STAT_TX_FIFO_HFL BIT(10)
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#define STAT_RX_TOGL BIT(9)
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#define STAT_RX_FIFO_FUL BIT(8)
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#define STAT_RX_FIFO_HFL BIT(7)
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#define STAT_TX_EMP BIT(6)
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#define STAT_TX_RDY BIT(5)
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#define STAT_RX_RDY BIT(4)
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#define STAT_BRK_DET BIT(3)
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#define STAT_FRM_ERR BIT(2)
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#define STAT_PAR_ERR BIT(1)
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#define STAT_OVR_ERR BIT(0)
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#define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\
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| STAT_PAR_ERR | STAT_OVR_ERR)
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#define UART_BRDV 0x10
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#define MVEBU_NR_UARTS 1
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#define MVEBU_UART_TYPE "mvebu-uart"
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static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
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struct mvebu_uart_data {
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struct uart_port *port;
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struct clk *clk;
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};
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/* Core UART Driver Operations */
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static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
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{
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unsigned long flags;
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unsigned int st;
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spin_lock_irqsave(&port->lock, flags);
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st = readl(port->membase + UART_STAT);
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spin_unlock_irqrestore(&port->lock, flags);
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return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0;
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}
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static unsigned int mvebu_uart_get_mctrl(struct uart_port *port)
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{
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return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
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}
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static void mvebu_uart_set_mctrl(struct uart_port *port,
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unsigned int mctrl)
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{
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/*
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* Even if we do not support configuring the modem control lines, this
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* function must be proided to the serial core
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*/
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}
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static void mvebu_uart_stop_tx(struct uart_port *port)
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{
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unsigned int ctl = readl(port->membase + UART_CTRL);
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ctl &= ~CTRL_TX_RDY_INT;
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writel(ctl, port->membase + UART_CTRL);
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}
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static void mvebu_uart_start_tx(struct uart_port *port)
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{
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unsigned int ctl = readl(port->membase + UART_CTRL);
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ctl |= CTRL_TX_RDY_INT;
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writel(ctl, port->membase + UART_CTRL);
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}
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static void mvebu_uart_stop_rx(struct uart_port *port)
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{
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unsigned int ctl = readl(port->membase + UART_CTRL);
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ctl &= ~CTRL_RX_INT;
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writel(ctl, port->membase + UART_CTRL);
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}
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static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
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{
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unsigned int ctl;
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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ctl = readl(port->membase + UART_CTRL);
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if (brk == -1)
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ctl |= CTRL_SND_BRK_SEQ;
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else
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ctl &= ~CTRL_SND_BRK_SEQ;
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writel(ctl, port->membase + UART_CTRL);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
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{
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struct tty_port *tport = &port->state->port;
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unsigned char ch = 0;
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char flag = 0;
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do {
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if (status & STAT_RX_RDY) {
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ch = readl(port->membase + UART_RBR);
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ch &= 0xff;
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flag = TTY_NORMAL;
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port->icount.rx++;
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if (status & STAT_PAR_ERR)
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port->icount.parity++;
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}
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if (status & STAT_BRK_DET) {
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port->icount.brk++;
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status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);
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if (uart_handle_break(port))
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goto ignore_char;
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}
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if (status & STAT_OVR_ERR)
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port->icount.overrun++;
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if (status & STAT_FRM_ERR)
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port->icount.frame++;
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if (uart_handle_sysrq_char(port, ch))
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goto ignore_char;
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if (status & port->ignore_status_mask & STAT_PAR_ERR)
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status &= ~STAT_RX_RDY;
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status &= port->read_status_mask;
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if (status & STAT_PAR_ERR)
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flag = TTY_PARITY;
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status &= ~port->ignore_status_mask;
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if (status & STAT_RX_RDY)
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tty_insert_flip_char(tport, ch, flag);
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if (status & STAT_BRK_DET)
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tty_insert_flip_char(tport, 0, TTY_BREAK);
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if (status & STAT_FRM_ERR)
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tty_insert_flip_char(tport, 0, TTY_FRAME);
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if (status & STAT_OVR_ERR)
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tty_insert_flip_char(tport, 0, TTY_OVERRUN);
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ignore_char:
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status = readl(port->membase + UART_STAT);
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} while (status & (STAT_RX_RDY | STAT_BRK_DET));
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tty_flip_buffer_push(tport);
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}
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static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
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{
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struct circ_buf *xmit = &port->state->xmit;
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unsigned int count;
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unsigned int st;
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if (port->x_char) {
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writel(port->x_char, port->membase + UART_TSH);
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port->icount.tx++;
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port->x_char = 0;
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return;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
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mvebu_uart_stop_tx(port);
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return;
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}
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for (count = 0; count < port->fifosize; count++) {
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writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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st = readl(port->membase + UART_STAT);
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if (st & STAT_TX_FIFO_FUL)
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break;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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mvebu_uart_stop_tx(port);
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}
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static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
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{
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struct uart_port *port = (struct uart_port *)dev_id;
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unsigned int st = readl(port->membase + UART_STAT);
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if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
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mvebu_uart_rx_chars(port, st);
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if (st & STAT_TX_RDY)
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mvebu_uart_tx_chars(port, st);
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return IRQ_HANDLED;
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}
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static int mvebu_uart_startup(struct uart_port *port)
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{
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int ret;
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writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
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port->membase + UART_CTRL);
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udelay(1);
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writel(CTRL_RX_INT, port->membase + UART_CTRL);
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ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
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port);
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if (ret) {
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dev_err(port->dev, "failed to request irq\n");
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return ret;
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}
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return 0;
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}
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static void mvebu_uart_shutdown(struct uart_port *port)
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{
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writel(0, port->membase + UART_CTRL);
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}
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static void mvebu_uart_set_termios(struct uart_port *port,
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struct ktermios *termios,
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struct ktermios *old)
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{
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unsigned long flags;
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unsigned int baud;
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spin_lock_irqsave(&port->lock, flags);
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port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
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STAT_TX_RDY | STAT_TX_FIFO_FUL;
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if (termios->c_iflag & INPCK)
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port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
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port->ignore_status_mask = 0;
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |=
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STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
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if ((termios->c_cflag & CREAD) == 0)
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port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
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if (old)
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tty_termios_copy_hw(termios, old);
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baud = uart_get_baud_rate(port, termios, old, 0, 460800);
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uart_update_timeout(port, termios->c_cflag, baud);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char *mvebu_uart_type(struct uart_port *port)
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{
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return MVEBU_UART_TYPE;
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}
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static void mvebu_uart_release_port(struct uart_port *port)
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{
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/* Nothing to do here */
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}
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static int mvebu_uart_request_port(struct uart_port *port)
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{
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return 0;
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}
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#ifdef CONFIG_CONSOLE_POLL
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static int mvebu_uart_get_poll_char(struct uart_port *port)
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{
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unsigned int st = readl(port->membase + UART_STAT);
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if (!(st & STAT_RX_RDY))
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return NO_POLL_CHAR;
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return readl(port->membase + UART_RBR);
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}
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static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
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{
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unsigned int st;
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for (;;) {
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st = readl(port->membase + UART_STAT);
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if (!(st & STAT_TX_FIFO_FUL))
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break;
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udelay(1);
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}
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writel(c, port->membase + UART_TSH);
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}
|
||||
#endif
|
||||
|
||||
static const struct uart_ops mvebu_uart_ops = {
|
||||
.tx_empty = mvebu_uart_tx_empty,
|
||||
.set_mctrl = mvebu_uart_set_mctrl,
|
||||
.get_mctrl = mvebu_uart_get_mctrl,
|
||||
.stop_tx = mvebu_uart_stop_tx,
|
||||
.start_tx = mvebu_uart_start_tx,
|
||||
.stop_rx = mvebu_uart_stop_rx,
|
||||
.break_ctl = mvebu_uart_break_ctl,
|
||||
.startup = mvebu_uart_startup,
|
||||
.shutdown = mvebu_uart_shutdown,
|
||||
.set_termios = mvebu_uart_set_termios,
|
||||
.type = mvebu_uart_type,
|
||||
.release_port = mvebu_uart_release_port,
|
||||
.request_port = mvebu_uart_request_port,
|
||||
#ifdef CONFIG_CONSOLE_POLL
|
||||
.poll_get_char = mvebu_uart_get_poll_char,
|
||||
.poll_put_char = mvebu_uart_put_poll_char,
|
||||
#endif
|
||||
};
|
||||
|
||||
/* Console Driver Operations */
|
||||
|
||||
#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
|
||||
/* Early Console */
|
||||
static void mvebu_uart_putc(struct uart_port *port, int c)
|
||||
{
|
||||
unsigned int st;
|
||||
|
||||
for (;;) {
|
||||
st = readl(port->membase + UART_STAT);
|
||||
if (!(st & STAT_TX_FIFO_FUL))
|
||||
break;
|
||||
}
|
||||
|
||||
writel(c, port->membase + UART_TSH);
|
||||
|
||||
for (;;) {
|
||||
st = readl(port->membase + UART_STAT);
|
||||
if (st & STAT_TX_FIFO_EMP)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void mvebu_uart_putc_early_write(struct console *con,
|
||||
const char *s,
|
||||
unsigned n)
|
||||
{
|
||||
struct earlycon_device *dev = con->data;
|
||||
|
||||
uart_console_write(&dev->port, s, n, mvebu_uart_putc);
|
||||
}
|
||||
|
||||
static int __init
|
||||
mvebu_uart_early_console_setup(struct earlycon_device *device,
|
||||
const char *opt)
|
||||
{
|
||||
if (!device->port.membase)
|
||||
return -ENODEV;
|
||||
|
||||
device->con->write = mvebu_uart_putc_early_write;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup);
|
||||
OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart",
|
||||
mvebu_uart_early_console_setup);
|
||||
|
||||
static void wait_for_xmitr(struct uart_port *port)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
readl_poll_timeout_atomic(port->membase + UART_STAT, val,
|
||||
(val & STAT_TX_EMP), 1, 10000);
|
||||
}
|
||||
|
||||
static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
|
||||
{
|
||||
wait_for_xmitr(port);
|
||||
writel(ch, port->membase + UART_TSH);
|
||||
}
|
||||
|
||||
static void mvebu_uart_console_write(struct console *co, const char *s,
|
||||
unsigned int count)
|
||||
{
|
||||
struct uart_port *port = &mvebu_uart_ports[co->index];
|
||||
unsigned long flags;
|
||||
unsigned int ier;
|
||||
int locked = 1;
|
||||
|
||||
if (oops_in_progress)
|
||||
locked = spin_trylock_irqsave(&port->lock, flags);
|
||||
else
|
||||
spin_lock_irqsave(&port->lock, flags);
|
||||
|
||||
ier = readl(port->membase + UART_CTRL) &
|
||||
(CTRL_RX_INT | CTRL_TX_RDY_INT);
|
||||
writel(0, port->membase + UART_CTRL);
|
||||
|
||||
uart_console_write(port, s, count, mvebu_uart_console_putchar);
|
||||
|
||||
wait_for_xmitr(port);
|
||||
|
||||
if (ier)
|
||||
writel(ier, port->membase + UART_CTRL);
|
||||
|
||||
if (locked)
|
||||
spin_unlock_irqrestore(&port->lock, flags);
|
||||
}
|
||||
|
||||
static int mvebu_uart_console_setup(struct console *co, char *options)
|
||||
{
|
||||
struct uart_port *port;
|
||||
int baud = 9600;
|
||||
int bits = 8;
|
||||
int parity = 'n';
|
||||
int flow = 'n';
|
||||
|
||||
if (co->index < 0 || co->index >= MVEBU_NR_UARTS)
|
||||
return -EINVAL;
|
||||
|
||||
port = &mvebu_uart_ports[co->index];
|
||||
|
||||
if (!port->mapbase || !port->membase) {
|
||||
pr_debug("console on ttyMV%i not present\n", co->index);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (options)
|
||||
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
||||
|
||||
return uart_set_options(port, co, baud, parity, bits, flow);
|
||||
}
|
||||
|
||||
static struct uart_driver mvebu_uart_driver;
|
||||
|
||||
static struct console mvebu_uart_console = {
|
||||
.name = "ttyMV",
|
||||
.write = mvebu_uart_console_write,
|
||||
.device = uart_console_device,
|
||||
.setup = mvebu_uart_console_setup,
|
||||
.flags = CON_PRINTBUFFER,
|
||||
.index = -1,
|
||||
.data = &mvebu_uart_driver,
|
||||
};
|
||||
|
||||
static int __init mvebu_uart_console_init(void)
|
||||
{
|
||||
register_console(&mvebu_uart_console);
|
||||
return 0;
|
||||
}
|
||||
|
||||
console_initcall(mvebu_uart_console_init);
|
||||
|
||||
|
||||
#endif /* CONFIG_SERIAL_MVEBU_CONSOLE */
|
||||
|
||||
static struct uart_driver mvebu_uart_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.driver_name = "mvebu_serial",
|
||||
.dev_name = "ttyMV",
|
||||
.nr = MVEBU_NR_UARTS,
|
||||
#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
|
||||
.cons = &mvebu_uart_console,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int mvebu_uart_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
||||
struct uart_port *port;
|
||||
struct mvebu_uart_data *data;
|
||||
int ret;
|
||||
|
||||
if (!reg || !irq) {
|
||||
dev_err(&pdev->dev, "no registers/irq defined\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
port = &mvebu_uart_ports[0];
|
||||
|
||||
spin_lock_init(&port->lock);
|
||||
|
||||
port->dev = &pdev->dev;
|
||||
port->type = PORT_MVEBU;
|
||||
port->ops = &mvebu_uart_ops;
|
||||
port->regshift = 0;
|
||||
|
||||
port->fifosize = 32;
|
||||
port->iotype = UPIO_MEM32;
|
||||
port->flags = UPF_FIXED_PORT;
|
||||
port->line = 0; /* single port: force line number to 0 */
|
||||
|
||||
port->irq = irq->start;
|
||||
port->irqflags = 0;
|
||||
port->mapbase = reg->start;
|
||||
|
||||
port->membase = devm_ioremap_resource(&pdev->dev, reg);
|
||||
if (IS_ERR(port->membase))
|
||||
return -PTR_ERR(port->membase);
|
||||
|
||||
data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
|
||||
GFP_KERNEL);
|
||||
if (!data)
|
||||
return -ENOMEM;
|
||||
|
||||
data->port = port;
|
||||
|
||||
port->private_data = data;
|
||||
platform_set_drvdata(pdev, data);
|
||||
|
||||
ret = uart_add_one_port(&mvebu_uart_driver, port);
|
||||
if (ret)
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mvebu_uart_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct mvebu_uart_data *data = platform_get_drvdata(pdev);
|
||||
|
||||
uart_remove_one_port(&mvebu_uart_driver, data->port);
|
||||
data->port->private_data = NULL;
|
||||
data->port->mapbase = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Match table for of_platform binding */
|
||||
static const struct of_device_id mvebu_uart_of_match[] = {
|
||||
{ .compatible = "marvell,armada-3700-uart", },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, mvebu_uart_of_match);
|
||||
|
||||
static struct platform_driver mvebu_uart_platform_driver = {
|
||||
.probe = mvebu_uart_probe,
|
||||
.remove = mvebu_uart_remove,
|
||||
.driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "mvebu-uart",
|
||||
.of_match_table = of_match_ptr(mvebu_uart_of_match),
|
||||
},
|
||||
};
|
||||
|
||||
static int __init mvebu_uart_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = uart_register_driver(&mvebu_uart_driver);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = platform_driver_register(&mvebu_uart_platform_driver);
|
||||
if (ret)
|
||||
uart_unregister_driver(&mvebu_uart_driver);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit mvebu_uart_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&mvebu_uart_platform_driver);
|
||||
uart_unregister_driver(&mvebu_uart_driver);
|
||||
}
|
||||
|
||||
arch_initcall(mvebu_uart_init);
|
||||
module_exit(mvebu_uart_exit);
|
||||
|
||||
MODULE_AUTHOR("Wilson Ding <dingwei@marvell.com>");
|
||||
MODULE_DESCRIPTION("Marvell Armada-3700 Serial Driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -261,4 +261,7 @@
|
|||
/* STM32 USART */
|
||||
#define PORT_STM32 113
|
||||
|
||||
/* MVEBU UART */
|
||||
#define PORT_MVEBU 114
|
||||
|
||||
#endif /* _UAPILINUX_SERIAL_CORE_H */
|
||||
|
|
|
|||
Loading…
Reference in a new issue