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drm/amd/display: Interfaces for hubp blank and soft reset
[WHY] HUBP blanking sequence on DCN30 requires us to check if HUBP is in blank and also toggle HUBP_DISABLE, which should instead be called HUBP_SOFT_RESET for what it does in HW. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1241,6 +1241,22 @@ void hubp1_vtg_sel(struct hubp *hubp, uint32_t otg_inst)
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REG_UPDATE(DCHUBP_CNTL, HUBP_VTG_SEL, otg_inst);
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REG_UPDATE(DCHUBP_CNTL, HUBP_VTG_SEL, otg_inst);
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}
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}
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bool hubp1_in_blank(struct hubp *hubp)
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{
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uint32_t in_blank;
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struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
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REG_GET(DCHUBP_CNTL, HUBP_IN_BLANK, &in_blank);
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return in_blank ? true : false;
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}
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void hubp1_soft_reset(struct hubp *hubp, bool reset)
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{
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struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
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REG_UPDATE(DCHUBP_CNTL, HUBP_DISABLE, reset ? 1 : 0);
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}
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void hubp1_init(struct hubp *hubp)
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void hubp1_init(struct hubp *hubp)
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{
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{
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//do nothing
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//do nothing
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@ -1272,6 +1288,8 @@ static const struct hubp_funcs dcn10_hubp_funcs = {
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.dmdata_set_attributes = NULL,
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.dmdata_set_attributes = NULL,
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.dmdata_load = NULL,
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.dmdata_load = NULL,
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.hubp_soft_reset = hubp1_soft_reset,
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.hubp_in_blank = hubp1_in_blank,
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};
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};
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/*****************************************/
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/*****************************************/
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@ -260,6 +260,7 @@
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HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_NO_OUTSTANDING_REQ, mask_sh),\
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HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_NO_OUTSTANDING_REQ, mask_sh),\
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HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_VTG_SEL, mask_sh),\
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HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_VTG_SEL, mask_sh),\
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HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_DISABLE, mask_sh),\
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HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_DISABLE, mask_sh),\
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HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_IN_BLANK, mask_sh),\
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HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_PIPES, mask_sh),\
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HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_PIPES, mask_sh),\
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HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_BANKS, mask_sh),\
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HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_BANKS, mask_sh),\
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HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, PIPE_INTERLEAVE, mask_sh),\
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HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, PIPE_INTERLEAVE, mask_sh),\
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@ -455,6 +456,7 @@
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type HUBP_VTG_SEL;\
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type HUBP_VTG_SEL;\
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type HUBP_UNDERFLOW_STATUS;\
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type HUBP_UNDERFLOW_STATUS;\
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type HUBP_UNDERFLOW_CLEAR;\
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type HUBP_UNDERFLOW_CLEAR;\
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type HUBP_IN_BLANK;\
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type NUM_PIPES;\
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type NUM_PIPES;\
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type NUM_BANKS;\
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type NUM_BANKS;\
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type PIPE_INTERLEAVE;\
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type PIPE_INTERLEAVE;\
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@ -772,5 +774,7 @@ void hubp1_vready_workaround(struct hubp *hubp,
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void hubp1_init(struct hubp *hubp);
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void hubp1_init(struct hubp *hubp);
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void hubp1_read_state_common(struct hubp *hubp);
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void hubp1_read_state_common(struct hubp *hubp);
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bool hubp1_in_blank(struct hubp *hubp);
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void hubp1_soft_reset(struct hubp *hubp, bool reset);
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#endif
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#endif
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@ -1595,6 +1595,8 @@ static struct hubp_funcs dcn20_hubp_funcs = {
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.hubp_set_flip_control_surface_gsl = hubp2_set_flip_control_surface_gsl,
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.hubp_set_flip_control_surface_gsl = hubp2_set_flip_control_surface_gsl,
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.hubp_init = hubp1_init,
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.hubp_init = hubp1_init,
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.validate_dml_output = hubp2_validate_dml_output,
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.validate_dml_output = hubp2_validate_dml_output,
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.hubp_in_blank = hubp1_in_blank,
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.hubp_soft_reset = hubp1_soft_reset,
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};
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};
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@ -509,6 +509,8 @@ static struct hubp_funcs dcn30_hubp_funcs = {
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.hubp_clear_underflow = hubp2_clear_underflow,
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.hubp_clear_underflow = hubp2_clear_underflow,
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.hubp_set_flip_control_surface_gsl = hubp2_set_flip_control_surface_gsl,
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.hubp_set_flip_control_surface_gsl = hubp2_set_flip_control_surface_gsl,
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.hubp_init = hubp3_init,
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.hubp_init = hubp3_init,
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.hubp_in_blank = hubp1_in_blank,
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.hubp_soft_reset = hubp1_soft_reset,
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};
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};
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bool hubp3_construct(
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bool hubp3_construct(
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@ -188,6 +188,8 @@ struct hubp_funcs {
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void (*set_unbounded_requesting)(
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void (*set_unbounded_requesting)(
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struct hubp *hubp,
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struct hubp *hubp,
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bool enable);
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bool enable);
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bool (*hubp_in_blank)(struct hubp *hubp);
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void (*hubp_soft_reset)(struct hubp *hubp, bool reset);
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};
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};
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