mirror of
https://github.com/torvalds/linux
synced 2024-10-10 13:24:04 +00:00
drm/meson: hold 32 lines after vsync to give time for AFBC start
When using an AFBC encoded frame, the AFBC Decoder must be reset, configured and enabled at each vsync IRQ. To leave time for that, use the maximum lines hold time to give time for AFBC setup and avoid visual glitches. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> [narmstrong: fix typo in commit log] Link: https://patchwork.freedesktop.org/patch/msgid/20191021091509.3864-9-narmstrong@baylibre.com
This commit is contained in:
parent
1b85270ff1
commit
24e0d4058e
|
@ -438,7 +438,7 @@ void meson_viu_init(struct meson_drm *priv)
|
|||
|
||||
/* Initialize OSD1 fifo control register */
|
||||
reg = VIU_OSD_DDR_PRIORITY_URGENT |
|
||||
VIU_OSD_HOLD_FIFO_LINES(4) |
|
||||
VIU_OSD_HOLD_FIFO_LINES(31) |
|
||||
VIU_OSD_FIFO_DEPTH_VAL(32) | /* fifo_depth_val: 32*8=256 */
|
||||
VIU_OSD_WORDS_PER_BURST(4) | /* 4 words in 1 burst */
|
||||
VIU_OSD_FIFO_LIMITS(2); /* fifo_lim: 2*16=32 */
|
||||
|
|
Loading…
Reference in a new issue