mirror of
https://github.com/torvalds/linux
synced 2024-10-01 17:00:41 +00:00
Merge branch 'torvalds:master' into master
This commit is contained in:
jaehj122
GitHub
commit
244d90e5b3
16
.mailmap
16
.mailmap
|
|
@ -38,6 +38,16 @@ Alexei Starovoitov <ast@kernel.org> <alexei.starovoitov@gmail.com>
|
|||
Alexei Starovoitov <ast@kernel.org> <ast@fb.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <ast@plumgrid.com>
|
||||
Alexey Makhalov <alexey.amakhalov@broadcom.com> <amakhalov@vmware.com>
|
||||
Alex Elder <elder@kernel.org>
|
||||
Alex Elder <elder@kernel.org> <aelder@sgi.com>
|
||||
Alex Elder <elder@kernel.org> <alex.elder@linaro.org>
|
||||
Alex Elder <elder@kernel.org> <alex.elder@linary.org>
|
||||
Alex Elder <elder@kernel.org> <elder@dreamhost.com>
|
||||
Alex Elder <elder@kernel.org> <elder@dreawmhost.com>
|
||||
Alex Elder <elder@kernel.org> <elder@ieee.org>
|
||||
Alex Elder <elder@kernel.org> <elder@inktank.com>
|
||||
Alex Elder <elder@kernel.org> <elder@linaro.org>
|
||||
Alex Elder <elder@kernel.org> <elder@newdream.net>
|
||||
Alex Hung <alexhung@gmail.com> <alex.hung@canonical.com>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@intel.com>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@linaro.org>
|
||||
|
|
@ -98,6 +108,8 @@ Ben Widawsky <bwidawsk@kernel.org> <ben@bwidawsk.net>
|
|||
Ben Widawsky <bwidawsk@kernel.org> <ben.widawsky@intel.com>
|
||||
Ben Widawsky <bwidawsk@kernel.org> <benjamin.widawsky@intel.com>
|
||||
Benjamin Poirier <benjamin.poirier@gmail.com> <bpoirier@suse.de>
|
||||
Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@gmail.com>
|
||||
Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@redhat.com>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn@kryo.se>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@linaro.org>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com>
|
||||
|
|
@ -446,7 +458,8 @@ Mythri P K <mythripk@ti.com>
|
|||
Nadav Amit <nadav.amit@gmail.com> <namit@vmware.com>
|
||||
Nadav Amit <nadav.amit@gmail.com> <namit@cs.technion.ac.il>
|
||||
Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com>
|
||||
Naoya Horiguchi <naoya.horiguchi@nec.com> <n-horiguchi@ah.jp.nec.com>
|
||||
Naoya Horiguchi <nao.horiguchi@gmail.com> <n-horiguchi@ah.jp.nec.com>
|
||||
Naoya Horiguchi <nao.horiguchi@gmail.com> <naoya.horiguchi@nec.com>
|
||||
Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>
|
||||
Neeraj Upadhyay <quic_neeraju@quicinc.com> <neeraju@codeaurora.org>
|
||||
Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
|
||||
|
|
@ -524,6 +537,7 @@ Rémi Denis-Courmont <rdenis@simphalempin.com>
|
|||
Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org>
|
||||
Ricardo Ribalda <ribalda@kernel.org> <ricardo.ribalda@gmail.com>
|
||||
Richard Genoud <richard.genoud@bootlin.com> <richard.genoud@gmail.com>
|
||||
Richard Leitner <richard.leitner@linux.dev> <dev@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com>
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -68,14 +68,10 @@ properties:
|
|||
pattern: cs16$
|
||||
- items:
|
||||
pattern: c32$
|
||||
- items:
|
||||
pattern: c32d-wl$
|
||||
- items:
|
||||
pattern: cs32$
|
||||
- items:
|
||||
pattern: c64$
|
||||
- items:
|
||||
pattern: c64d-wl$
|
||||
- items:
|
||||
pattern: cs64$
|
||||
- items:
|
||||
|
|
@ -136,6 +132,7 @@ properties:
|
|||
- renesas,r1ex24128
|
||||
- samsung,s524ad0xd1
|
||||
- const: atmel,24c128
|
||||
- pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st
|
||||
|
||||
label:
|
||||
description: Descriptive name of the EEPROM.
|
||||
|
|
|
|||
|
|
@ -52,6 +52,9 @@ properties:
|
|||
- const: main
|
||||
- const: mm
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
|
||||
|
||||
maintainers:
|
||||
- Richard Genoud <richard.genoud@gmail.com>
|
||||
- Richard Genoud <richard.genoud@bootlin.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -171,6 +171,7 @@ allOf:
|
|||
unevaluatedProperties: false
|
||||
|
||||
pcie-phy:
|
||||
type: object
|
||||
description:
|
||||
Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
|
||||
|
||||
|
|
|
|||
|
|
@ -24,10 +24,10 @@ fragmentation statistics can be obtained through gfp flag information of
|
|||
each page. It is already implemented and activated if page owner is
|
||||
enabled. Other usages are more than welcome.
|
||||
|
||||
It can also be used to show all the stacks and their outstanding
|
||||
allocations, which gives us a quick overview of where the memory is going
|
||||
without the need to screen through all the pages and match the allocation
|
||||
and free operation.
|
||||
It can also be used to show all the stacks and their current number of
|
||||
allocated base pages, which gives us a quick overview of where the memory
|
||||
is going without the need to screen through all the pages and match the
|
||||
allocation and free operation.
|
||||
|
||||
page owner is disabled by default. So, if you'd like to use it, you need
|
||||
to add "page_owner=on" to your boot cmdline. If the kernel is built
|
||||
|
|
@ -75,42 +75,45 @@ Usage
|
|||
|
||||
cat /sys/kernel/debug/page_owner_stacks/show_stacks > stacks.txt
|
||||
cat stacks.txt
|
||||
prep_new_page+0xa9/0x120
|
||||
get_page_from_freelist+0x7e6/0x2140
|
||||
__alloc_pages+0x18a/0x370
|
||||
new_slab+0xc8/0x580
|
||||
___slab_alloc+0x1f2/0xaf0
|
||||
__slab_alloc.isra.86+0x22/0x40
|
||||
kmem_cache_alloc+0x31b/0x350
|
||||
__khugepaged_enter+0x39/0x100
|
||||
dup_mmap+0x1c7/0x5ce
|
||||
copy_process+0x1afe/0x1c90
|
||||
kernel_clone+0x9a/0x3c0
|
||||
__do_sys_clone+0x66/0x90
|
||||
do_syscall_64+0x7f/0x160
|
||||
entry_SYSCALL_64_after_hwframe+0x6c/0x74
|
||||
stack_count: 234
|
||||
post_alloc_hook+0x177/0x1a0
|
||||
get_page_from_freelist+0xd01/0xd80
|
||||
__alloc_pages+0x39e/0x7e0
|
||||
allocate_slab+0xbc/0x3f0
|
||||
___slab_alloc+0x528/0x8a0
|
||||
kmem_cache_alloc+0x224/0x3b0
|
||||
sk_prot_alloc+0x58/0x1a0
|
||||
sk_alloc+0x32/0x4f0
|
||||
inet_create+0x427/0xb50
|
||||
__sock_create+0x2e4/0x650
|
||||
inet_ctl_sock_create+0x30/0x180
|
||||
igmp_net_init+0xc1/0x130
|
||||
ops_init+0x167/0x410
|
||||
setup_net+0x304/0xa60
|
||||
copy_net_ns+0x29b/0x4a0
|
||||
create_new_namespaces+0x4a1/0x820
|
||||
nr_base_pages: 16
|
||||
...
|
||||
...
|
||||
echo 7000 > /sys/kernel/debug/page_owner_stacks/count_threshold
|
||||
cat /sys/kernel/debug/page_owner_stacks/show_stacks> stacks_7000.txt
|
||||
cat stacks_7000.txt
|
||||
prep_new_page+0xa9/0x120
|
||||
get_page_from_freelist+0x7e6/0x2140
|
||||
__alloc_pages+0x18a/0x370
|
||||
alloc_pages_mpol+0xdf/0x1e0
|
||||
folio_alloc+0x14/0x50
|
||||
filemap_alloc_folio+0xb0/0x100
|
||||
page_cache_ra_unbounded+0x97/0x180
|
||||
filemap_fault+0x4b4/0x1200
|
||||
__do_fault+0x2d/0x110
|
||||
do_pte_missing+0x4b0/0xa30
|
||||
__handle_mm_fault+0x7fa/0xb70
|
||||
handle_mm_fault+0x125/0x300
|
||||
do_user_addr_fault+0x3c9/0x840
|
||||
exc_page_fault+0x68/0x150
|
||||
asm_exc_page_fault+0x22/0x30
|
||||
stack_count: 8248
|
||||
post_alloc_hook+0x177/0x1a0
|
||||
get_page_from_freelist+0xd01/0xd80
|
||||
__alloc_pages+0x39e/0x7e0
|
||||
alloc_pages_mpol+0x22e/0x490
|
||||
folio_alloc+0xd5/0x110
|
||||
filemap_alloc_folio+0x78/0x230
|
||||
page_cache_ra_order+0x287/0x6f0
|
||||
filemap_get_pages+0x517/0x1160
|
||||
filemap_read+0x304/0x9f0
|
||||
xfs_file_buffered_read+0xe6/0x1d0 [xfs]
|
||||
xfs_file_read_iter+0x1f0/0x380 [xfs]
|
||||
__kernel_read+0x3b9/0x730
|
||||
kernel_read_file+0x309/0x4d0
|
||||
__do_sys_finit_module+0x381/0x730
|
||||
do_syscall_64+0x8d/0x150
|
||||
entry_SYSCALL_64_after_hwframe+0x62/0x6a
|
||||
nr_base_pages: 20824
|
||||
...
|
||||
|
||||
cat /sys/kernel/debug/page_owner > page_owner_full.txt
|
||||
|
|
|
|||
|
|
@ -252,7 +252,7 @@ an involved disclosed party. The current ambassadors list:
|
|||
AMD Tom Lendacky <thomas.lendacky@amd.com>
|
||||
Ampere Darren Hart <darren@os.amperecomputing.com>
|
||||
ARM Catalin Marinas <catalin.marinas@arm.com>
|
||||
IBM Power Anton Blanchard <anton@linux.ibm.com>
|
||||
IBM Power Michael Ellerman <ellerman@au.ibm.com>
|
||||
IBM Z Christian Borntraeger <borntraeger@de.ibm.com>
|
||||
Intel Tony Luck <tony.luck@intel.com>
|
||||
Qualcomm Trilok Soni <quic_tsoni@quicinc.com>
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@ support corresponds to ``S`` values in the ``MAINTAINERS`` file.
|
|||
Architecture Level of support Constraints
|
||||
============= ================ ==============================================
|
||||
``arm64`` Maintained Little Endian only.
|
||||
``loongarch`` Maintained -
|
||||
``loongarch`` Maintained \-
|
||||
``um`` Maintained ``x86_64`` only.
|
||||
``x86`` Maintained ``x86_64`` only.
|
||||
============= ================ ==============================================
|
||||
|
|
|
|||
27
MAINTAINERS
27
MAINTAINERS
|
|
@ -7829,9 +7829,8 @@ W: http://aeschi.ch.eu.org/efs/
|
|||
F: fs/efs/
|
||||
|
||||
EHEA (IBM pSeries eHEA 10Gb ethernet adapter) DRIVER
|
||||
M: Douglas Miller <dougmill@linux.ibm.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/net/ethernet/ibm/ehea/
|
||||
|
||||
ELM327 CAN NETWORK DRIVER
|
||||
|
|
@ -8746,10 +8745,9 @@ S: Orphan
|
|||
F: drivers/usb/gadget/udc/fsl*
|
||||
|
||||
FREESCALE USB PHY DRIVER
|
||||
M: Ran Wang <ran.wang_1@nxp.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/usb/phy/phy-fsl-usb*
|
||||
|
||||
FREEVXFS FILESYSTEM
|
||||
|
|
@ -9577,7 +9575,7 @@ F: kernel/power/
|
|||
|
||||
HID CORE LAYER
|
||||
M: Jiri Kosina <jikos@kernel.org>
|
||||
M: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
M: Benjamin Tissoires <bentiss@kernel.org>
|
||||
L: linux-input@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git
|
||||
|
|
@ -10024,7 +10022,7 @@ F: drivers/media/platform/st/sti/hva
|
|||
|
||||
HWPOISON MEMORY FAILURE HANDLING
|
||||
M: Miaohe Lin <linmiaohe@huawei.com>
|
||||
R: Naoya Horiguchi <naoya.horiguchi@nec.com>
|
||||
R: Naoya Horiguchi <nao.horiguchi@gmail.com>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/hwpoison-inject.c
|
||||
|
|
@ -11995,7 +11993,7 @@ F: include/keys/encrypted-type.h
|
|||
F: security/keys/encrypted-keys/
|
||||
|
||||
KEYS-TRUSTED
|
||||
M: James Bottomley <jejb@linux.ibm.com>
|
||||
M: James Bottomley <James.Bottomley@HansenPartnership.com>
|
||||
M: Jarkko Sakkinen <jarkko@kernel.org>
|
||||
M: Mimi Zohar <zohar@linux.ibm.com>
|
||||
L: linux-integrity@vger.kernel.org
|
||||
|
|
@ -14357,7 +14355,7 @@ F: drivers/dma/at_xdmac.c
|
|||
F: include/dt-bindings/dma/at91.h
|
||||
|
||||
MICROCHIP AT91 SERIAL DRIVER
|
||||
M: Richard Genoud <richard.genoud@gmail.com>
|
||||
M: Richard Genoud <richard.genoud@bootlin.com>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
|
||||
F: drivers/tty/serial/atmel_serial.c
|
||||
|
|
@ -16800,12 +16798,6 @@ S: Maintained
|
|||
F: drivers/leds/leds-pca9532.c
|
||||
F: include/linux/leds-pca9532.h
|
||||
|
||||
PCA9541 I2C BUS MASTER SELECTOR DRIVER
|
||||
M: Guenter Roeck <linux@roeck-us.net>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/i2c/muxes/i2c-mux-pca9541.c
|
||||
|
||||
PCI DRIVER FOR AARDVARK (Marvell Armada 3700)
|
||||
M: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
|
||||
M: Pali Rohár <pali@kernel.org>
|
||||
|
|
@ -17874,7 +17866,7 @@ F: Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.yaml
|
|||
F: drivers/media/rc/pwm-ir-tx.c
|
||||
|
||||
PWM SUBSYSTEM
|
||||
M: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
|
||||
M: Uwe Kleine-König <ukleinek@kernel.org>
|
||||
L: linux-pwm@vger.kernel.org
|
||||
S: Maintained
|
||||
Q: https://patchwork.ozlabs.org/project/linux-pwm/list/
|
||||
|
|
@ -19669,7 +19661,7 @@ F: drivers/scsi/sg.c
|
|||
F: include/scsi/sg.h
|
||||
|
||||
SCSI SUBSYSTEM
|
||||
M: "James E.J. Bottomley" <jejb@linux.ibm.com>
|
||||
M: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>
|
||||
M: "Martin K. Petersen" <martin.petersen@oracle.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -20178,7 +20170,6 @@ F: include/linux/platform_data/simplefb.h
|
|||
|
||||
SIOX
|
||||
M: Thorsten Scherer <t.scherer@eckelmann.de>
|
||||
M: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
|
||||
R: Pengutronix Kernel Team <kernel@pengutronix.de>
|
||||
S: Supported
|
||||
F: drivers/gpio/gpio-siox.c
|
||||
|
|
@ -22840,7 +22831,7 @@ F: drivers/usb/host/ehci*
|
|||
|
||||
USB HID/HIDBP DRIVERS (USB KEYBOARDS, MICE, REMOTE CONTROLS, ...)
|
||||
M: Jiri Kosina <jikos@kernel.org>
|
||||
M: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
M: Benjamin Tissoires <bentiss@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -2,7 +2,7 @@
|
|||
VERSION = 6
|
||||
PATCHLEVEL = 9
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -6,7 +6,6 @@
|
|||
config ARC
|
||||
def_bool y
|
||||
select ARC_TIMERS
|
||||
select ARCH_HAS_CPU_CACHE_ALIASING
|
||||
select ARCH_HAS_CACHE_LINE_SIZE
|
||||
select ARCH_HAS_DEBUG_VM_PGTABLE
|
||||
select ARCH_HAS_DMA_PREP_COHERENT
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
# uImage build relies on mkimage being availble on your host for ARC target
|
||||
# uImage build relies on mkimage being available on your host for ARC target
|
||||
# You will need to build u-boot for ARC, rename mkimage to arc-elf32-mkimage
|
||||
# and make sure it's reacable from your PATH
|
||||
# and make sure it's reachable from your PATH
|
||||
|
||||
OBJCOPYFLAGS= -O binary -R .note -R .note.gnu.build-id -R .comment -S
|
||||
|
||||
|
|
|
|||
|
|
@ -119,9 +119,9 @@ mmc@15000 {
|
|||
/*
|
||||
* The DW APB ICTL intc on MB is connected to CPU intc via a
|
||||
* DT "invisible" DW APB GPIO block, configured to simply pass thru
|
||||
* interrupts - setup accordinly in platform init (plat-axs10x/ax10x.c)
|
||||
* interrupts - setup accordingly in platform init (plat-axs10x/ax10x.c)
|
||||
*
|
||||
* So here we mimic a direct connection betwen them, ignoring the
|
||||
* So here we mimic a direct connection between them, ignoring the
|
||||
* ABPG GPIO. Thus set "interrupts = <24>" (DW APB GPIO to core)
|
||||
* instead of "interrupts = <12>" (DW APB ICTL to DW APB GPIO)
|
||||
*
|
||||
|
|
|
|||
|
|
@ -205,7 +205,6 @@ dmac_cfg_clk: dmac-gpu-cfg-clk {
|
|||
};
|
||||
|
||||
gmac: ethernet@8000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dwmac";
|
||||
reg = <0x8000 0x2000>;
|
||||
interrupts = <10>;
|
||||
|
|
|
|||
|
|
@ -113,7 +113,7 @@ mmc@15000 {
|
|||
/*
|
||||
* Embedded Vision subsystem UIO mappings; only relevant for EV VDK
|
||||
*
|
||||
* This node is intentionally put outside of MB above becase
|
||||
* This node is intentionally put outside of MB above because
|
||||
* it maps areas outside of MB's 0xez-0xfz.
|
||||
*/
|
||||
uio_ev: uio@d0000000 {
|
||||
|
|
|
|||
|
|
@ -1,9 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef __ASM_ARC_CACHETYPE_H
|
||||
#define __ASM_ARC_CACHETYPE_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
#define cpu_dcache_is_aliasing() true
|
||||
|
||||
#endif
|
||||
|
|
@ -12,7 +12,7 @@
|
|||
/*
|
||||
* DSP-related saved registers - need to be saved only when you are
|
||||
* scheduled out.
|
||||
* structure fields name must correspond to aux register defenitions for
|
||||
* structure fields name must correspond to aux register definitions for
|
||||
* automatic offset calculation in DSP_AUX_SAVE_RESTORE macros
|
||||
*/
|
||||
struct dsp_callee_regs {
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
* Stack switching code can no longer reliably rely on the fact that
|
||||
* if we are NOT in user mode, stack is switched to kernel mode.
|
||||
* e.g. L2 IRQ interrupted a L1 ISR which had not yet completed
|
||||
* it's prologue including stack switching from user mode
|
||||
* its prologue including stack switching from user mode
|
||||
*
|
||||
* Vineetg: Aug 28th 2008: Bug #94984
|
||||
* -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap
|
||||
|
|
@ -143,7 +143,7 @@
|
|||
* 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)
|
||||
* 3. But before it could switch SP from USER to KERNEL stack
|
||||
* a L2 IRQ "Interrupts" L1
|
||||
* Thay way although L2 IRQ happened in Kernel mode, stack is still
|
||||
* That way although L2 IRQ happened in Kernel mode, stack is still
|
||||
* not switched.
|
||||
* To handle this, we may need to switch stack even if in kernel mode
|
||||
* provided SP has values in range of USER mode stack ( < 0x7000_0000 )
|
||||
|
|
@ -173,7 +173,7 @@
|
|||
|
||||
GET_CURR_TASK_ON_CPU r9
|
||||
|
||||
/* With current tsk in r9, get it's kernel mode stack base */
|
||||
/* With current tsk in r9, get its kernel mode stack base */
|
||||
GET_TSK_STACK_BASE r9, r9
|
||||
|
||||
/* save U mode SP @ pt_regs->sp */
|
||||
|
|
@ -282,7 +282,7 @@
|
|||
* NOTE:
|
||||
*
|
||||
* It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
|
||||
* for memory load operations. If used in that way interrupts are deffered
|
||||
* for memory load operations. If used in that way interrupts are deferred
|
||||
* by hardware and that is not good.
|
||||
*-------------------------------------------------------------*/
|
||||
.macro EXCEPTION_EPILOGUE
|
||||
|
|
@ -350,7 +350,7 @@
|
|||
* NOTE:
|
||||
*
|
||||
* It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
|
||||
* for memory load operations. If used in that way interrupts are deffered
|
||||
* for memory load operations. If used in that way interrupts are deferred
|
||||
* by hardware and that is not good.
|
||||
*-------------------------------------------------------------*/
|
||||
.macro INTERRUPT_EPILOGUE LVL
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
#ifndef __ASM_ARC_ENTRY_H
|
||||
#define __ASM_ARC_ENTRY_H
|
||||
|
||||
#include <asm/unistd.h> /* For NR_syscalls defination */
|
||||
#include <asm/unistd.h> /* For NR_syscalls definition */
|
||||
#include <asm/arcregs.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/processor.h> /* For VMALLOC_START */
|
||||
|
|
@ -56,7 +56,7 @@
|
|||
.endm
|
||||
|
||||
/*-------------------------------------------------------------
|
||||
* given a tsk struct, get to the base of it's kernel mode stack
|
||||
* given a tsk struct, get to the base of its kernel mode stack
|
||||
* tsk->thread_info is really a PAGE, whose bottom hoists stack
|
||||
* which grows upwards towards thread_info
|
||||
*------------------------------------------------------------*/
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
* ARCv2 can support 240 interrupts in the core interrupts controllers and
|
||||
* 128 interrupts in IDU. Thus 512 virtual IRQs must be enough for most
|
||||
* configurations of boards.
|
||||
* This doesnt affect ARCompact, but we change it to same value
|
||||
* This doesn't affect ARCompact, but we change it to same value
|
||||
*/
|
||||
#define NR_IRQS 512
|
||||
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@
|
|||
* IRQ Control Macros
|
||||
*
|
||||
* All of them have "memory" clobber (compiler barrier) which is needed to
|
||||
* ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)
|
||||
* ensure that LD/ST requiring irq safety (R-M-W when LLSC is not available)
|
||||
* are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)
|
||||
*
|
||||
* Noted at the time of Abilis Timer List corruption
|
||||
|
|
|
|||
|
|
@ -165,7 +165,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
|
|||
* for retiring-mm. However destroy_context( ) still needs to do that because
|
||||
* between mm_release( ) = >deactive_mm( ) and
|
||||
* mmput => .. => __mmdrop( ) => destroy_context( )
|
||||
* there is a good chance that task gets sched-out/in, making it's ASID valid
|
||||
* there is a good chance that task gets sched-out/in, making its ASID valid
|
||||
* again (this teased me for a whole day).
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -66,7 +66,7 @@
|
|||
* Other rules which cause the divergence from 1:1 mapping
|
||||
*
|
||||
* 1. Although ARC700 can do exclusive execute/write protection (meaning R
|
||||
* can be tracked independet of X/W unlike some other CPUs), still to
|
||||
* can be tracked independently of X/W unlike some other CPUs), still to
|
||||
* keep things consistent with other archs:
|
||||
* -Write implies Read: W => R
|
||||
* -Execute implies Read: X => R
|
||||
|
|
|
|||
|
|
@ -169,7 +169,7 @@ static inline unsigned long regs_get_register(struct pt_regs *regs,
|
|||
return *(unsigned long *)((unsigned long)regs + offset);
|
||||
}
|
||||
|
||||
extern int syscall_trace_entry(struct pt_regs *);
|
||||
extern int syscall_trace_enter(struct pt_regs *);
|
||||
extern void syscall_trace_exit(struct pt_regs *);
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
#ifndef __ARC_ASM_SHMPARAM_H
|
||||
#define __ARC_ASM_SHMPARAM_H
|
||||
|
||||
/* Handle upto 2 cache bins */
|
||||
/* Handle up to 2 cache bins */
|
||||
#define SHMLBA (2 * PAGE_SIZE)
|
||||
|
||||
/* Enforce SHMLBA in shmat */
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ static inline const char *arc_platform_smp_cpuinfo(void)
|
|||
|
||||
/*
|
||||
* ARC700 doesn't support atomic Read-Modify-Write ops.
|
||||
* Originally Interrupts had to be disabled around code to gaurantee atomicity.
|
||||
* Originally Interrupts had to be disabled around code to guarantee atomicity.
|
||||
* The LLOCK/SCOND insns allow writing interrupt-hassle-free based atomic ops
|
||||
* based on retry-if-irq-in-atomic (with hardware assist).
|
||||
* However despite these, we provide the IRQ disabling variant
|
||||
|
|
@ -86,7 +86,7 @@ static inline const char *arc_platform_smp_cpuinfo(void)
|
|||
* support needed.
|
||||
*
|
||||
* (2) In a SMP setup, the LLOCK/SCOND atomicity across CPUs needs to be
|
||||
* gaurantted by the platform (not something which core handles).
|
||||
* guaranteed by the platform (not something which core handles).
|
||||
* Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ
|
||||
* disabling for atomicity.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
struct thread_info {
|
||||
unsigned long flags; /* low level flags */
|
||||
unsigned long ksp; /* kernel mode stack top in __switch_to */
|
||||
int preempt_count; /* 0 => preemptable, <0 => BUG */
|
||||
int preempt_count; /* 0 => preemptible, <0 => BUG */
|
||||
int cpu; /* current CPU */
|
||||
unsigned long thr_ptr; /* TLS ptr */
|
||||
struct task_struct *task; /* main task structure */
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@
|
|||
* 8051fdc4: st r2,[r1,20] ; Mem op : save result back to mem
|
||||
*
|
||||
* Joern suggested a better "C" algorithm which is great since
|
||||
* (1) It is portable to any architecure
|
||||
* (1) It is portable to any architecture
|
||||
* (2) At the same time it takes advantage of ARC ISA (rotate intrns)
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
* Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h> /* ARC_{EXTRY,EXIT} */
|
||||
#include <linux/linkage.h> /* ARC_{ENTRY,EXIT} */
|
||||
#include <asm/entry.h> /* SAVE_ALL_{INT1,INT2,TRAP...} */
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arcregs.h>
|
||||
|
|
@ -31,7 +31,7 @@ VECTOR res_service ; Reset Vector
|
|||
VECTOR mem_service ; Mem exception
|
||||
VECTOR instr_service ; Instrn Error
|
||||
VECTOR EV_MachineCheck ; Fatal Machine check
|
||||
VECTOR EV_TLBMissI ; Intruction TLB miss
|
||||
VECTOR EV_TLBMissI ; Instruction TLB miss
|
||||
VECTOR EV_TLBMissD ; Data TLB miss
|
||||
VECTOR EV_TLBProtV ; Protection Violation
|
||||
VECTOR EV_PrivilegeV ; Privilege Violation
|
||||
|
|
@ -76,11 +76,11 @@ ENTRY(handle_interrupt)
|
|||
# query in hard ISR path would return false (since .IE is set) which would
|
||||
# trips genirq interrupt handling asserts.
|
||||
#
|
||||
# So do a "soft" disable of interrutps here.
|
||||
# So do a "soft" disable of interrupts here.
|
||||
#
|
||||
# Note this disable is only for consistent book-keeping as further interrupts
|
||||
# will be disabled anyways even w/o this. Hardware tracks active interrupts
|
||||
# seperately in AUX_IRQ_ACT.active and will not take new interrupts
|
||||
# separately in AUX_IRQ_ACT.active and will not take new interrupts
|
||||
# unless this one returns (or higher prio becomes pending in 2-prio scheme)
|
||||
|
||||
IRQ_DISABLE
|
||||
|
|
|
|||
|
|
@ -95,7 +95,7 @@ ENTRY(EV_MachineCheck)
|
|||
lr r0, [efa]
|
||||
mov r1, sp
|
||||
|
||||
; MC excpetions disable MMU
|
||||
; MC exceptions disable MMU
|
||||
ARC_MMU_REENABLE r3
|
||||
|
||||
lsr r3, r10, 8
|
||||
|
|
@ -209,7 +209,7 @@ trap_with_param:
|
|||
|
||||
; ---------------------------------------------
|
||||
; syscall TRAP
|
||||
; ABI: (r0-r7) upto 8 args, (r8) syscall number
|
||||
; ABI: (r0-r7) up to 8 args, (r8) syscall number
|
||||
; ---------------------------------------------
|
||||
|
||||
ENTRY(EV_Trap)
|
||||
|
|
|
|||
|
|
@ -165,7 +165,7 @@ ENTRY(first_lines_of_secondary)
|
|||
; setup stack (fp, sp)
|
||||
mov fp, 0
|
||||
|
||||
; set it's stack base to tsk->thread_info bottom
|
||||
; set its stack base to tsk->thread_info bottom
|
||||
GET_TSK_STACK_BASE r0, sp
|
||||
|
||||
j start_kernel_secondary
|
||||
|
|
|
|||
|
|
@ -56,7 +56,7 @@ void arc_init_IRQ(void)
|
|||
WRITE_AUX(AUX_IRQ_CTRL, ictrl);
|
||||
|
||||
/*
|
||||
* ARCv2 core intc provides multiple interrupt priorities (upto 16).
|
||||
* ARCv2 core intc provides multiple interrupt priorities (up to 16).
|
||||
* Typical builds though have only two levels (0-high, 1-low)
|
||||
* Linux by default uses lower prio 1 for most irqs, reserving 0 for
|
||||
* NMI style interrupts in future (say perf)
|
||||
|
|
|
|||
|
|
@ -190,7 +190,8 @@ static void __kprobes setup_singlestep(struct kprobe *p, struct pt_regs *regs)
|
|||
}
|
||||
}
|
||||
|
||||
int __kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
||||
static int
|
||||
__kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
||||
{
|
||||
struct kprobe *p;
|
||||
struct kprobe_ctlblk *kcb;
|
||||
|
|
@ -241,8 +242,8 @@ int __kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __kprobes arc_post_kprobe_handler(unsigned long addr,
|
||||
struct pt_regs *regs)
|
||||
static int
|
||||
__kprobes arc_post_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
||||
{
|
||||
struct kprobe *cur = kprobe_running();
|
||||
struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
* (based on a specific RTL build)
|
||||
* Below is the static map between perf generic/arc specific event_id and
|
||||
* h/w condition names.
|
||||
* At the time of probe, we loop thru each index and find it's name to
|
||||
* At the time of probe, we loop thru each index and find its name to
|
||||
* complete the mapping of perf event_id to h/w index as latter is needed
|
||||
* to program the counter really
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -390,7 +390,7 @@ static void arc_chk_core_config(struct cpuinfo_arc *info)
|
|||
#ifdef CONFIG_ARC_HAS_DCCM
|
||||
/*
|
||||
* DCCM can be arbit placed in hardware.
|
||||
* Make sure it's placement/sz matches what Linux is built with
|
||||
* Make sure its placement/sz matches what Linux is built with
|
||||
*/
|
||||
if ((unsigned int)__arc_dccm_base != info->dccm.base)
|
||||
panic("Linux built with incorrect DCCM Base address\n");
|
||||
|
|
|
|||
|
|
@ -8,15 +8,16 @@
|
|||
*
|
||||
* vineetg: Nov 2009 (Everything needed for TIF_RESTORE_SIGMASK)
|
||||
* -do_signal() supports TIF_RESTORE_SIGMASK
|
||||
* -do_signal() no loner needs oldset, required by OLD sys_sigsuspend
|
||||
* -sys_rt_sigsuspend() now comes from generic code, so discard arch implemen
|
||||
* -do_signal() no longer needs oldset, required by OLD sys_sigsuspend
|
||||
* -sys_rt_sigsuspend() now comes from generic code, so discard arch
|
||||
* implementation
|
||||
* -sys_sigsuspend() no longer needs to fudge ptregs, hence that arg removed
|
||||
* -sys_sigsuspend() no longer loops for do_signal(), sets TIF_xxx and leaves
|
||||
* the job to do_signal()
|
||||
*
|
||||
* vineetg: July 2009
|
||||
* -Modified Code to support the uClibc provided userland sigreturn stub
|
||||
* to avoid kernel synthesing it on user stack at runtime, costing TLB
|
||||
* to avoid kernel synthesizing it on user stack at runtime, costing TLB
|
||||
* probes and Cache line flushes.
|
||||
*
|
||||
* vineetg: July 2009
|
||||
|
|
|
|||
|
|
@ -89,7 +89,7 @@ int do_misaligned_access(unsigned long address, struct pt_regs *regs,
|
|||
|
||||
/*
|
||||
* Entry point for miscll errors such as Nested Exceptions
|
||||
* -Duplicate TLB entry is handled seperately though
|
||||
* -Duplicate TLB entry is handled separately though
|
||||
*/
|
||||
void do_machine_check_fault(unsigned long address, struct pt_regs *regs)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -41,8 +41,8 @@ SECTIONS
|
|||
#endif
|
||||
|
||||
/*
|
||||
* The reason for having a seperate subsection .init.ramfs is to
|
||||
* prevent objump from including it in kernel dumps
|
||||
* The reason for having a separate subsection .init.ramfs is to
|
||||
* prevent objdump from including it in kernel dumps
|
||||
*
|
||||
* Reason for having .init.ramfs above .init is to make sure that the
|
||||
* binary blob is tucked away to one side, reducing the displacement
|
||||
|
|
|
|||
|
|
@ -212,7 +212,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
|
|||
unsigned long flags;
|
||||
|
||||
/* If range @start to @end is more than 32 TLB entries deep,
|
||||
* its better to move to a new ASID rather than searching for
|
||||
* it's better to move to a new ASID rather than searching for
|
||||
* individual entries and then shooting them down
|
||||
*
|
||||
* The calc above is rough, doesn't account for unaligned parts,
|
||||
|
|
@ -408,7 +408,7 @@ static void create_tlb(struct vm_area_struct *vma, unsigned long vaddr, pte_t *p
|
|||
* -More importantly it makes this handler inconsistent with fast-path
|
||||
* TLB Refill handler which always deals with "current"
|
||||
*
|
||||
* Lets see the use cases when current->mm != vma->mm and we land here
|
||||
* Let's see the use cases when current->mm != vma->mm and we land here
|
||||
* 1. execve->copy_strings()->__get_user_pages->handle_mm_fault
|
||||
* Here VM wants to pre-install a TLB entry for user stack while
|
||||
* current->mm still points to pre-execve mm (hence the condition).
|
||||
|
|
|
|||
|
|
@ -5,19 +5,19 @@
|
|||
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
|
||||
*
|
||||
* Vineetg: April 2011 :
|
||||
* -MMU v1: moved out legacy code into a seperate file
|
||||
* -MMU v1: moved out legacy code into a separate file
|
||||
* -MMU v3: PD{0,1} bits layout changed: They don't overlap anymore,
|
||||
* helps avoid a shift when preparing PD0 from PTE
|
||||
*
|
||||
* Vineetg: July 2009
|
||||
* -For MMU V2, we need not do heuristics at the time of commiting a D-TLB
|
||||
* entry, so that it doesn't knock out it's I-TLB entry
|
||||
* -For MMU V2, we need not do heuristics at the time of committing a D-TLB
|
||||
* entry, so that it doesn't knock out its I-TLB entry
|
||||
* -Some more fine tuning:
|
||||
* bmsk instead of add, asl.cc instead of branch, delay slot utilise etc
|
||||
*
|
||||
* Vineetg: July 2009
|
||||
* -Practically rewrote the I/D TLB Miss handlers
|
||||
* Now 40 and 135 instructions a peice as compared to 131 and 449 resp.
|
||||
* Now 40 and 135 instructions apiece as compared to 131 and 449 resp.
|
||||
* Hence Leaner by 1.5 K
|
||||
* Used Conditional arithmetic to replace excessive branching
|
||||
* Also used short instructions wherever possible
|
||||
|
|
|
|||
|
|
@ -242,7 +242,7 @@ vddcore: VDD_CORE {
|
|||
|
||||
regulator-state-standby {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-voltage = <1150000>;
|
||||
regulator-suspend-microvolt = <1150000>;
|
||||
regulator-mode = <4>;
|
||||
};
|
||||
|
||||
|
|
@ -263,7 +263,7 @@ vddcpu: VDD_OTHER {
|
|||
|
||||
regulator-state-standby {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-voltage = <1050000>;
|
||||
regulator-suspend-microvolt = <1050000>;
|
||||
regulator-mode = <4>;
|
||||
};
|
||||
|
||||
|
|
@ -280,7 +280,7 @@ vldo1: LDO1 {
|
|||
regulator-always-on;
|
||||
|
||||
regulator-state-standby {
|
||||
regulator-suspend-voltage = <1800000>;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
|
||||
|
|
@ -296,7 +296,7 @@ vldo2: LDO2 {
|
|||
regulator-always-on;
|
||||
|
||||
regulator-state-standby {
|
||||
regulator-suspend-voltage = <3300000>;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -293,7 +293,7 @@ vddcore: VDD_CORE {
|
|||
|
||||
regulator-state-standby {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-voltage = <1150000>;
|
||||
regulator-suspend-microvolt = <1150000>;
|
||||
regulator-mode = <4>;
|
||||
};
|
||||
|
||||
|
|
@ -314,7 +314,7 @@ vddcpu: VDD_OTHER {
|
|||
|
||||
regulator-state-standby {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-voltage = <1050000>;
|
||||
regulator-suspend-microvolt = <1050000>;
|
||||
regulator-mode = <4>;
|
||||
};
|
||||
|
||||
|
|
@ -331,7 +331,7 @@ vldo1: LDO1 {
|
|||
regulator-always-on;
|
||||
|
||||
regulator-state-standby {
|
||||
regulator-suspend-voltage = <1800000>;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
|
||||
|
|
@ -346,7 +346,7 @@ vldo2: LDO2 {
|
|||
regulator-max-microvolt = <3700000>;
|
||||
|
||||
regulator-state-standby {
|
||||
regulator-suspend-voltage = <1800000>;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -805,6 +805,7 @@ &usbotg1 {
|
|||
&pinctrl_usb_pwr>;
|
||||
dr_mode = "host";
|
||||
power-active-high;
|
||||
over-current-active-low;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1672,7 +1672,7 @@ mipi_csi_1: csi@32e50000 {
|
|||
<&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>,
|
||||
<&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
|
||||
clock-names = "pclk", "wrap", "phy", "axi";
|
||||
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>,
|
||||
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM2_PIX>,
|
||||
<&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
|
||||
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
|
||||
<&clk IMX8MP_CLK_24M>;
|
||||
|
|
|
|||
|
|
@ -129,7 +129,7 @@ ethernet_phy0: ethernet-phy@5 {
|
|||
};
|
||||
|
||||
&pio {
|
||||
eth_default: eth_default {
|
||||
eth_default: eth-default-pins {
|
||||
tx_pins {
|
||||
pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>,
|
||||
<MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2>,
|
||||
|
|
@ -156,7 +156,7 @@ mdio_pins {
|
|||
};
|
||||
};
|
||||
|
||||
eth_sleep: eth_sleep {
|
||||
eth_sleep: eth-sleep-pins {
|
||||
tx_pins {
|
||||
pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>,
|
||||
<MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72>,
|
||||
|
|
@ -182,14 +182,14 @@ mdio_pins {
|
|||
};
|
||||
};
|
||||
|
||||
usb0_id_pins_float: usb0_iddig {
|
||||
usb0_id_pins_float: usb0-iddig-pins {
|
||||
pins_iddig {
|
||||
pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
usb1_id_pins_float: usb1_iddig {
|
||||
usb1_id_pins_float: usb1-iddig-pins {
|
||||
pins_iddig {
|
||||
pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>;
|
||||
bias-pull-up;
|
||||
|
|
|
|||
|
|
@ -249,10 +249,11 @@ topckgen: syscon@10000000 {
|
|||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
infracfg: syscon@10001000 {
|
||||
infracfg: clock-controller@10001000 {
|
||||
compatible = "mediatek,mt2712-infracfg", "syscon";
|
||||
reg = <0 0x10001000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
pericfg: syscon@10003000 {
|
||||
|
|
|
|||
|
|
@ -252,7 +252,7 @@ scpsys: power-controller@10006000 {
|
|||
clock-names = "hif_sel";
|
||||
};
|
||||
|
||||
cir: cir@10009000 {
|
||||
cir: ir-receiver@10009000 {
|
||||
compatible = "mediatek,mt7622-cir";
|
||||
reg = <0 0x10009000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
|
@ -283,16 +283,14 @@ thermal_calibration: calib@198 {
|
|||
};
|
||||
};
|
||||
|
||||
apmixedsys: apmixedsys@10209000 {
|
||||
compatible = "mediatek,mt7622-apmixedsys",
|
||||
"syscon";
|
||||
apmixedsys: clock-controller@10209000 {
|
||||
compatible = "mediatek,mt7622-apmixedsys";
|
||||
reg = <0 0x10209000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
topckgen: topckgen@10210000 {
|
||||
compatible = "mediatek,mt7622-topckgen",
|
||||
"syscon";
|
||||
topckgen: clock-controller@10210000 {
|
||||
compatible = "mediatek,mt7622-topckgen";
|
||||
reg = <0 0x10210000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
|
@ -515,7 +513,6 @@ thermal: thermal@1100b000 {
|
|||
<&pericfg CLK_PERI_AUXADC_PD>;
|
||||
clock-names = "therm", "auxadc";
|
||||
resets = <&pericfg MT7622_PERI_THERM_SW_RST>;
|
||||
reset-names = "therm";
|
||||
mediatek,auxadc = <&auxadc>;
|
||||
mediatek,apmixedsys = <&apmixedsys>;
|
||||
nvmem-cells = <&thermal_calibration>;
|
||||
|
|
@ -734,9 +731,8 @@ wmac: wmac@18000000 {
|
|||
power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>;
|
||||
};
|
||||
|
||||
ssusbsys: ssusbsys@1a000000 {
|
||||
compatible = "mediatek,mt7622-ssusbsys",
|
||||
"syscon";
|
||||
ssusbsys: clock-controller@1a000000 {
|
||||
compatible = "mediatek,mt7622-ssusbsys";
|
||||
reg = <0 0x1a000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
|
|
@ -793,9 +789,8 @@ u2port1: usb-phy@1a0c5000 {
|
|||
};
|
||||
};
|
||||
|
||||
pciesys: pciesys@1a100800 {
|
||||
compatible = "mediatek,mt7622-pciesys",
|
||||
"syscon";
|
||||
pciesys: clock-controller@1a100800 {
|
||||
compatible = "mediatek,mt7622-pciesys";
|
||||
reg = <0 0x1a100800 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
|
|
@ -921,12 +916,13 @@ sata_port: sata-phy@1a243000 {
|
|||
};
|
||||
};
|
||||
|
||||
hifsys: syscon@1af00000 {
|
||||
compatible = "mediatek,mt7622-hifsys", "syscon";
|
||||
hifsys: clock-controller@1af00000 {
|
||||
compatible = "mediatek,mt7622-hifsys";
|
||||
reg = <0 0x1af00000 0 0x70>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
ethsys: syscon@1b000000 {
|
||||
ethsys: clock-controller@1b000000 {
|
||||
compatible = "mediatek,mt7622-ethsys",
|
||||
"syscon";
|
||||
reg = <0 0x1b000000 0 0x1000>;
|
||||
|
|
@ -966,9 +962,7 @@ wed1: wed@1020b000 {
|
|||
};
|
||||
|
||||
eth: ethernet@1b100000 {
|
||||
compatible = "mediatek,mt7622-eth",
|
||||
"mediatek,mt2701-eth",
|
||||
"syscon";
|
||||
compatible = "mediatek,mt7622-eth";
|
||||
reg = <0 0x1b100000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_SPI 224 IRQ_TYPE_LEVEL_LOW>,
|
||||
|
|
|
|||
|
|
@ -146,19 +146,19 @@ sfp2: sfp-2 {
|
|||
|
||||
&cpu_thermal {
|
||||
cooling-maps {
|
||||
cpu-active-high {
|
||||
map-cpu-active-high {
|
||||
/* active: set fan to cooling level 2 */
|
||||
cooling-device = <&fan 2 2>;
|
||||
trip = <&cpu_trip_active_high>;
|
||||
};
|
||||
|
||||
cpu-active-med {
|
||||
map-cpu-active-med {
|
||||
/* active: set fan to cooling level 1 */
|
||||
cooling-device = <&fan 1 1>;
|
||||
trip = <&cpu_trip_active_med>;
|
||||
};
|
||||
|
||||
cpu-active-low {
|
||||
map-cpu-active-low {
|
||||
/* active: set fan to cooling level 0 */
|
||||
cooling-device = <&fan 0 0>;
|
||||
trip = <&cpu_trip_active_low>;
|
||||
|
|
|
|||
|
|
@ -332,9 +332,8 @@ thermal: thermal@1100c800 {
|
|||
reg = <0 0x1100c800 0 0x800>;
|
||||
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_THERM_CK>,
|
||||
<&infracfg CLK_INFRA_ADC_26M_CK>,
|
||||
<&infracfg CLK_INFRA_ADC_FRC_CK>;
|
||||
clock-names = "therm", "auxadc", "adc_32k";
|
||||
<&infracfg CLK_INFRA_ADC_26M_CK>;
|
||||
clock-names = "therm", "auxadc";
|
||||
nvmem-cells = <&thermal_calibration>;
|
||||
nvmem-cell-names = "calibration-data";
|
||||
#thermal-sensor-cells = <1>;
|
||||
|
|
@ -492,8 +491,6 @@ ethsys: syscon@15000000 {
|
|||
compatible = "mediatek,mt7986-ethsys",
|
||||
"syscon";
|
||||
reg = <0 0x15000000 0 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
|
@ -556,7 +553,6 @@ eth: ethernet@15100000 {
|
|||
<&topckgen CLK_TOP_SGM_325M_SEL>;
|
||||
assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>,
|
||||
<&apmixedsys CLK_APMIXED_SGMPLL>;
|
||||
#reset-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mediatek,ethsys = <ðsys>;
|
||||
|
|
|
|||
|
|
@ -433,7 +433,6 @@ &mt6358regulator {
|
|||
};
|
||||
|
||||
&mt6358_vgpu_reg {
|
||||
regulator-min-microvolt = <625000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
|
||||
regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
|
||||
|
|
|
|||
|
|
@ -1637,6 +1637,7 @@ mfgcfg: syscon@13000000 {
|
|||
compatible = "mediatek,mt8183-mfgcfg", "syscon";
|
||||
reg = <0 0x13000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
power-domains = <&spm MT8183_POWER_DOMAIN_MFG_ASYNC>;
|
||||
};
|
||||
|
||||
gpu: gpu@13040000 {
|
||||
|
|
|
|||
|
|
@ -1296,7 +1296,7 @@ mt6366_vgpu_reg: vgpu {
|
|||
* regulator coupling requirements.
|
||||
*/
|
||||
regulator-name = "ppvar_dvdd_vgpu";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <6250>;
|
||||
regulator-enable-ramp-delay = <200>;
|
||||
|
|
|
|||
|
|
@ -1421,7 +1421,7 @@ regulators {
|
|||
mt6315_6_vbuck1: vbuck1 {
|
||||
regulator-compatible = "vbuck1";
|
||||
regulator-name = "Vbcpu";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1193750>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-allowed-modes = <0 1 2>;
|
||||
|
|
@ -1431,7 +1431,7 @@ mt6315_6_vbuck1: vbuck1 {
|
|||
mt6315_6_vbuck3: vbuck3 {
|
||||
regulator-compatible = "vbuck3";
|
||||
regulator-name = "Vlcpu";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1193750>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-allowed-modes = <0 1 2>;
|
||||
|
|
@ -1448,7 +1448,7 @@ regulators {
|
|||
mt6315_7_vbuck1: vbuck1 {
|
||||
regulator-compatible = "vbuck1";
|
||||
regulator-name = "Vgpu";
|
||||
regulator-min-microvolt = <606250>;
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <800000>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-allowed-modes = <0 1 2>;
|
||||
|
|
|
|||
|
|
@ -1464,6 +1464,7 @@ mutex: mutex@14001000 {
|
|||
reg = <0 0x14001000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
|
||||
mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
|
||||
mediatek,gce-events = <CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_0>,
|
||||
<CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_1>;
|
||||
power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
|
||||
|
|
|
|||
|
|
@ -264,6 +264,38 @@ &auxadc {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <&mt6359_vcore_buck_reg>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
cpu-supply = <&mt6359_vcore_buck_reg>;
|
||||
};
|
||||
|
||||
&cpu2 {
|
||||
cpu-supply = <&mt6359_vcore_buck_reg>;
|
||||
};
|
||||
|
||||
&cpu3 {
|
||||
cpu-supply = <&mt6359_vcore_buck_reg>;
|
||||
};
|
||||
|
||||
&cpu4 {
|
||||
cpu-supply = <&mt6315_6_vbuck1>;
|
||||
};
|
||||
|
||||
&cpu5 {
|
||||
cpu-supply = <&mt6315_6_vbuck1>;
|
||||
};
|
||||
|
||||
&cpu6 {
|
||||
cpu-supply = <&mt6315_6_vbuck1>;
|
||||
};
|
||||
|
||||
&cpu7 {
|
||||
cpu-supply = <&mt6315_6_vbuck1>;
|
||||
};
|
||||
|
||||
&dp_intf0 {
|
||||
status = "okay";
|
||||
|
||||
|
|
@ -1214,7 +1246,7 @@ regulators {
|
|||
mt6315_6_vbuck1: vbuck1 {
|
||||
regulator-compatible = "vbuck1";
|
||||
regulator-name = "Vbcpu";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1193750>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-ramp-delay = <6250>;
|
||||
|
|
@ -1232,7 +1264,7 @@ regulators {
|
|||
mt6315_7_vbuck1: vbuck1 {
|
||||
regulator-compatible = "vbuck1";
|
||||
regulator-name = "Vgpu";
|
||||
regulator-min-microvolt = <625000>;
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1193750>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-ramp-delay = <6250>;
|
||||
|
|
|
|||
|
|
@ -2028,6 +2028,7 @@ vppsys0: syscon@14000000 {
|
|||
compatible = "mediatek,mt8195-vppsys0", "syscon";
|
||||
reg = <0 0x14000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0 0x1000>;
|
||||
};
|
||||
|
||||
dma-controller@14001000 {
|
||||
|
|
@ -2251,6 +2252,7 @@ vppsys1: syscon@14f00000 {
|
|||
compatible = "mediatek,mt8195-vppsys1", "syscon";
|
||||
reg = <0 0x14f00000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0 0x1000>;
|
||||
};
|
||||
|
||||
mutex@14f01000 {
|
||||
|
|
@ -3080,6 +3082,7 @@ vdosys0: syscon@1c01a000 {
|
|||
reg = <0 0x1c01a000 0 0x1000>;
|
||||
mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
|
||||
#clock-cells = <1>;
|
||||
mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xa000 0x1000>;
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -3261,6 +3264,7 @@ mutex: mutex@1c016000 {
|
|||
interrupts = <GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
|
||||
clocks = <&vdosys0 CLK_VDO0_DISP_MUTEX0>;
|
||||
mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x6000 0x1000>;
|
||||
mediatek,gce-events = <CMDQ_EVENT_VDO0_DISP_STREAM_DONE_0>;
|
||||
};
|
||||
|
||||
|
|
@ -3331,6 +3335,7 @@ mutex1: mutex@1c101000 {
|
|||
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
|
||||
clocks = <&vdosys1 CLK_VDO1_DISP_MUTEX>;
|
||||
clock-names = "vdo1_mutex";
|
||||
mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>;
|
||||
mediatek,gce-events = <CMDQ_EVENT_VDO1_STREAM_DONE_ENG_0>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -3707,7 +3707,7 @@ remoteproc_adsp: remoteproc@3700000 {
|
|||
compatible = "qcom,sc7280-adsp-pas";
|
||||
reg = <0 0x03700000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -3944,7 +3944,7 @@ remoteproc_cdsp: remoteproc@a300000 {
|
|||
compatible = "qcom,sc7280-cdsp-pas";
|
||||
reg = <0 0x0a300000 0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
|
|||
|
|
@ -2701,7 +2701,7 @@ usb_sec: usb@a8f8800 {
|
|||
resets = <&gcc GCC_USB30_SEC_BCR>;
|
||||
power-domains = <&gcc USB30_SEC_GDSC>;
|
||||
interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&pdc 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&pdc 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&pdc 10 IRQ_TYPE_EDGE_BOTH>,
|
||||
<&pdc 11 IRQ_TYPE_EDGE_BOTH>;
|
||||
interrupt-names = "hs_phy_irq", "ss_phy_irq",
|
||||
|
|
|
|||
|
|
@ -1774,6 +1774,7 @@ pcie4: pcie@1c00000 {
|
|||
reset-names = "pci";
|
||||
|
||||
power-domains = <&gcc PCIE_4_GDSC>;
|
||||
required-opps = <&rpmhpd_opp_nom>;
|
||||
|
||||
phys = <&pcie4_phy>;
|
||||
phy-names = "pciephy";
|
||||
|
|
@ -1872,6 +1873,7 @@ pcie3b: pcie@1c08000 {
|
|||
reset-names = "pci";
|
||||
|
||||
power-domains = <&gcc PCIE_3B_GDSC>;
|
||||
required-opps = <&rpmhpd_opp_nom>;
|
||||
|
||||
phys = <&pcie3b_phy>;
|
||||
phy-names = "pciephy";
|
||||
|
|
@ -1970,6 +1972,7 @@ pcie3a: pcie@1c10000 {
|
|||
reset-names = "pci";
|
||||
|
||||
power-domains = <&gcc PCIE_3A_GDSC>;
|
||||
required-opps = <&rpmhpd_opp_nom>;
|
||||
|
||||
phys = <&pcie3a_phy>;
|
||||
phy-names = "pciephy";
|
||||
|
|
@ -2071,6 +2074,7 @@ pcie2b: pcie@1c18000 {
|
|||
reset-names = "pci";
|
||||
|
||||
power-domains = <&gcc PCIE_2B_GDSC>;
|
||||
required-opps = <&rpmhpd_opp_nom>;
|
||||
|
||||
phys = <&pcie2b_phy>;
|
||||
phy-names = "pciephy";
|
||||
|
|
@ -2169,6 +2173,7 @@ pcie2a: pcie@1c20000 {
|
|||
reset-names = "pci";
|
||||
|
||||
power-domains = <&gcc PCIE_2A_GDSC>;
|
||||
required-opps = <&rpmhpd_opp_nom>;
|
||||
|
||||
phys = <&pcie2a_phy>;
|
||||
phy-names = "pciephy";
|
||||
|
|
@ -2641,7 +2646,7 @@ remoteproc_adsp: remoteproc@3000000 {
|
|||
compatible = "qcom,sc8280xp-adsp-pas";
|
||||
reg = <0 0x03000000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -4977,7 +4982,7 @@ remoteproc_nsp0: remoteproc@1b300000 {
|
|||
compatible = "qcom,sc8280xp-nsp0-pas";
|
||||
reg = <0 0x1b300000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp0_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp0_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp0_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -5108,7 +5113,7 @@ remoteproc_nsp1: remoteproc@21300000 {
|
|||
compatible = "qcom,sc8280xp-nsp1-pas";
|
||||
reg = <0 0x21300000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 887 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 887 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp1_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp1_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp1_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
|
|||
|
|
@ -1252,7 +1252,7 @@ adsp: remoteproc@3000000 {
|
|||
compatible = "qcom,sm6350-adsp-pas";
|
||||
reg = <0 0x03000000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -1511,7 +1511,7 @@ cdsp: remoteproc@8300000 {
|
|||
compatible = "qcom,sm6350-cdsp-pas";
|
||||
reg = <0 0x08300000 0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
|
|||
|
|
@ -1561,7 +1561,7 @@ remoteproc_adsp: remoteproc@a400000 {
|
|||
compatible = "qcom,sm6375-adsp-pas";
|
||||
reg = <0 0x0a400000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
|
|||
|
|
@ -3062,7 +3062,7 @@ slpi: remoteproc@5c00000 {
|
|||
compatible = "qcom,sm8250-slpi-pas";
|
||||
reg = <0 0x05c00000 0 0x4000>;
|
||||
|
||||
interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&pdc 9 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -3766,7 +3766,7 @@ cdsp: remoteproc@8300000 {
|
|||
compatible = "qcom,sm8250-cdsp-pas";
|
||||
reg = <0 0x08300000 0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -5928,7 +5928,7 @@ adsp: remoteproc@17300000 {
|
|||
compatible = "qcom,sm8250-adsp-pas";
|
||||
reg = <0 0x17300000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
|
|||
|
|
@ -1777,12 +1777,8 @@ pcie0: pcie@1c00000 {
|
|||
ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
|
||||
|
||||
/*
|
||||
* MSIs for BDF (1:0.0) only works with Device ID 0x5980.
|
||||
* Hence, the IDs are swapped.
|
||||
*/
|
||||
msi-map = <0x0 &gic_its 0x5981 0x1>,
|
||||
<0x100 &gic_its 0x5980 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x5980 0x1>,
|
||||
<0x100 &gic_its 0x5981 0x1>;
|
||||
msi-map-mask = <0xff00>;
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -1900,12 +1896,8 @@ pcie1: pcie@1c08000 {
|
|||
ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
|
||||
|
||||
/*
|
||||
* MSIs for BDF (1:0.0) only works with Device ID 0x5a00.
|
||||
* Hence, the IDs are swapped.
|
||||
*/
|
||||
msi-map = <0x0 &gic_its 0x5a01 0x1>,
|
||||
<0x100 &gic_its 0x5a00 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x5a00 0x1>,
|
||||
<0x100 &gic_its 0x5a01 0x1>;
|
||||
msi-map-mask = <0xff00>;
|
||||
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
|
|||
|
|
@ -1755,9 +1755,8 @@ pcie0: pcie@1c00000 {
|
|||
<&gem_noc MASTER_APPSS_PROC 0 &cnoc_main SLAVE_PCIE_0 0>;
|
||||
interconnect-names = "pcie-mem", "cpu-pcie";
|
||||
|
||||
/* Entries are reversed due to the unusual ITS DeviceID encoding */
|
||||
msi-map = <0x0 &gic_its 0x1401 0x1>,
|
||||
<0x100 &gic_its 0x1400 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x1400 0x1>,
|
||||
<0x100 &gic_its 0x1401 0x1>;
|
||||
iommu-map = <0x0 &apps_smmu 0x1400 0x1>,
|
||||
<0x100 &apps_smmu 0x1401 0x1>;
|
||||
|
||||
|
|
@ -1867,9 +1866,8 @@ pcie1: pcie@1c08000 {
|
|||
<&gem_noc MASTER_APPSS_PROC 0 &cnoc_main SLAVE_PCIE_1 0>;
|
||||
interconnect-names = "pcie-mem", "cpu-pcie";
|
||||
|
||||
/* Entries are reversed due to the unusual ITS DeviceID encoding */
|
||||
msi-map = <0x0 &gic_its 0x1481 0x1>,
|
||||
<0x100 &gic_its 0x1480 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x1480 0x1>,
|
||||
<0x100 &gic_its 0x1481 0x1>;
|
||||
iommu-map = <0x0 &apps_smmu 0x1480 0x1>,
|
||||
<0x100 &apps_smmu 0x1481 0x1>;
|
||||
|
||||
|
|
|
|||
|
|
@ -2274,9 +2274,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
|
|||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
/* Entries are reversed due to the unusual ITS DeviceID encoding */
|
||||
msi-map = <0x0 &gic_its 0x1401 0x1>,
|
||||
<0x100 &gic_its 0x1400 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x1400 0x1>,
|
||||
<0x100 &gic_its 0x1401 0x1>;
|
||||
msi-map-mask = <0xff00>;
|
||||
|
||||
linux,pci-domain = <0>;
|
||||
|
|
@ -2402,9 +2401,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
|
|||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
/* Entries are reversed due to the unusual ITS DeviceID encoding */
|
||||
msi-map = <0x0 &gic_its 0x1481 0x1>,
|
||||
<0x100 &gic_its 0x1480 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x1480 0x1>,
|
||||
<0x100 &gic_its 0x1481 0x1>;
|
||||
msi-map-mask = <0xff00>;
|
||||
|
||||
linux,pci-domain = <1>;
|
||||
|
|
|
|||
|
|
@ -284,7 +284,7 @@ CLUSTER_C4: cpu-sleep-0 {
|
|||
|
||||
domain-idle-states {
|
||||
CLUSTER_CL4: cluster-sleep-0 {
|
||||
compatible = "arm,idle-state";
|
||||
compatible = "domain-idle-state";
|
||||
idle-state-name = "l2-ret";
|
||||
arm,psci-suspend-param = <0x01000044>;
|
||||
entry-latency-us = <350>;
|
||||
|
|
@ -293,7 +293,7 @@ CLUSTER_CL4: cluster-sleep-0 {
|
|||
};
|
||||
|
||||
CLUSTER_CL5: cluster-sleep-1 {
|
||||
compatible = "arm,idle-state";
|
||||
compatible = "domain-idle-state";
|
||||
idle-state-name = "ret-pll-off";
|
||||
arm,psci-suspend-param = <0x01000054>;
|
||||
entry-latency-us = <2200>;
|
||||
|
|
|
|||
|
|
@ -663,7 +663,7 @@ mipi_in_panel: endpoint {
|
|||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
mipi1_in_panel: endpoint@1 {
|
||||
mipi1_in_panel: endpoint {
|
||||
remote-endpoint = <&mipi1_out_panel>;
|
||||
};
|
||||
};
|
||||
|
|
@ -689,7 +689,6 @@ &pcie0 {
|
|||
ep-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
/* PERST# asserted in S3 */
|
||||
pcie-reset-suspend = <1>;
|
||||
|
||||
vpcie3v3-supply = <&wlan_3v3>;
|
||||
vpcie1v8-supply = <&pp1800_pcie>;
|
||||
|
|
|
|||
|
|
@ -611,7 +611,7 @@ device@4 {
|
|||
#size-cells = <0>;
|
||||
|
||||
interface@0 { /* interface 0 of configuration 1 */
|
||||
compatible = "usbbda,8156.config1.0";
|
||||
compatible = "usbifbda,8156.config1.0";
|
||||
reg = <0 1>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -779,7 +779,6 @@ &pcie_phy {
|
|||
};
|
||||
|
||||
&pcie0 {
|
||||
bus-scan-delay-ms = <1000>;
|
||||
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||||
num-lanes = <4>;
|
||||
pinctrl-names = "default";
|
||||
|
|
|
|||
|
|
@ -194,6 +194,8 @@ &pcie0 {
|
|||
num-lanes = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_clkreqn_cpm>;
|
||||
vpcie3v3-supply = <&vcc3v3_baseboard>;
|
||||
vpcie12v-supply = <&dc_12v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -79,6 +79,26 @@ vcc5v0_sys: vcc5v0-sys {
|
|||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
vcca_0v9: vcca-0v9-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcca_0v9";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
vin-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
vcca_1v8: vcca-1v8-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcca_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc3v3_sys>;
|
||||
};
|
||||
|
||||
vdd_log: vdd-log {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm2 0 25000 1>;
|
||||
|
|
@ -416,16 +436,28 @@ &io_domains {
|
|||
gpio1830-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
status = "okay";
|
||||
pmu1830-supply = <&vcc_1v8>;
|
||||
&pcie0 {
|
||||
/* PCIe PHY supplies */
|
||||
vpcie0v9-supply = <&vcca_0v9>;
|
||||
vpcie1v8-supply = <&vcca_1v8>;
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
status = "okay";
|
||||
&pcie_clkreqn_cpm {
|
||||
rockchip,pins =
|
||||
<2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&q7_thermal_pin>;
|
||||
|
||||
gpios {
|
||||
q7_thermal_pin: q7-thermal-pin {
|
||||
rockchip,pins =
|
||||
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c8 {
|
||||
i2c8_xfer_a: i2c8-xfer {
|
||||
rockchip,pins =
|
||||
|
|
@ -458,11 +490,20 @@ vcc5v0_host_en: vcc5v0-host-en {
|
|||
usb3 {
|
||||
usb3_id: usb3-id {
|
||||
rockchip,pins =
|
||||
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
status = "okay";
|
||||
pmu1830-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
/*
|
||||
* Signal integrity isn't great at 200MHz but 100MHz has proven stable
|
||||
|
|
|
|||
|
|
@ -447,7 +447,6 @@ rgmii_phy1: phy@0 {
|
|||
|
||||
&pcie2x1 {
|
||||
reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
disable-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -416,6 +416,8 @@ regulator-state-mem {
|
|||
|
||||
vccio_sd: LDO_REG5 {
|
||||
regulator-name = "vccio_sd";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
|
|
@ -525,9 +527,9 @@ &mdio0 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch@0 {
|
||||
switch@1f {
|
||||
compatible = "mediatek,mt7531";
|
||||
reg = <0>;
|
||||
reg = <0x1f>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -523,7 +523,6 @@ &pcie3x2 {
|
|||
|
||||
&pcie2x1 {
|
||||
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_mini_pcie>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -216,9 +216,9 @@ &i2c7 {
|
|||
pinctrl-0 = <&i2c7m0_xfer>;
|
||||
status = "okay";
|
||||
|
||||
es8316: audio-codec@11 {
|
||||
es8316: audio-codec@10 {
|
||||
compatible = "everest,es8316";
|
||||
reg = <0x11>;
|
||||
reg = <0x10>;
|
||||
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
|
||||
assigned-clock-rates = <12288000>;
|
||||
clocks = <&cru I2S0_8CH_MCLKOUT>;
|
||||
|
|
|
|||
|
|
@ -485,6 +485,7 @@ pmic@0 {
|
|||
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
|
||||
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||
spi-max-frequency = <1000000>;
|
||||
system-power-controller;
|
||||
|
||||
vcc1-supply = <&vcc5v0_sys>;
|
||||
vcc2-supply = <&vcc5v0_sys>;
|
||||
|
|
@ -506,7 +507,7 @@ pmic@0 {
|
|||
#gpio-cells = <2>;
|
||||
|
||||
rk806_dvs1_null: dvs1-null-pins {
|
||||
pins = "gpio_pwrctrl2";
|
||||
pins = "gpio_pwrctrl1";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -456,6 +456,7 @@ pmic@0 {
|
|||
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||
pinctrl-names = "default";
|
||||
spi-max-frequency = <1000000>;
|
||||
system-power-controller;
|
||||
|
||||
vcc1-supply = <&vcc4v0_sys>;
|
||||
vcc2-supply = <&vcc4v0_sys>;
|
||||
|
|
|
|||
|
|
@ -289,6 +289,11 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL)
|
|||
adr_l x1, __hyp_text_end
|
||||
adr_l x2, dcache_clean_poc
|
||||
blr x2
|
||||
|
||||
mov_q x0, INIT_SCTLR_EL2_MMU_OFF
|
||||
pre_disable_mmu_workaround
|
||||
msr sctlr_el2, x0
|
||||
isb
|
||||
0:
|
||||
mov_q x0, HCR_HOST_NVHE_FLAGS
|
||||
|
||||
|
|
@ -323,13 +328,11 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL)
|
|||
cbz x0, 2f
|
||||
|
||||
/* Set a sane SCTLR_EL1, the VHE way */
|
||||
pre_disable_mmu_workaround
|
||||
msr_s SYS_SCTLR_EL12, x1
|
||||
mov x2, #BOOT_CPU_FLAG_E2H
|
||||
b 3f
|
||||
|
||||
2:
|
||||
pre_disable_mmu_workaround
|
||||
msr sctlr_el1, x1
|
||||
mov x2, xzr
|
||||
3:
|
||||
|
|
|
|||
|
|
@ -276,7 +276,10 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
|
|||
pte_t *ptep = NULL;
|
||||
|
||||
pgdp = pgd_offset(mm, addr);
|
||||
p4dp = p4d_offset(pgdp, addr);
|
||||
p4dp = p4d_alloc(mm, pgdp, addr);
|
||||
if (!p4dp)
|
||||
return NULL;
|
||||
|
||||
pudp = pud_alloc(mm, p4dp, addr);
|
||||
if (!pudp)
|
||||
return NULL;
|
||||
|
|
|
|||
|
|
@ -219,9 +219,6 @@ bool kernel_page_present(struct page *page)
|
|||
pte_t *ptep;
|
||||
unsigned long addr = (unsigned long)page_address(page);
|
||||
|
||||
if (!can_set_direct_map())
|
||||
return true;
|
||||
|
||||
pgdp = pgd_offset_k(addr);
|
||||
if (pgd_none(READ_ONCE(*pgdp)))
|
||||
return false;
|
||||
|
|
|
|||
|
|
@ -595,7 +595,7 @@ config ARCH_SELECTS_CRASH_DUMP
|
|||
select RELOCATABLE
|
||||
|
||||
config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
|
||||
def_bool CRASH_CORE
|
||||
def_bool CRASH_RESERVE
|
||||
|
||||
config RELOCATABLE
|
||||
bool "Relocatable kernel"
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
#ifndef _LOONGARCH_CRASH_CORE_H
|
||||
#define _LOONGARCH_CRASH_CORE_H
|
||||
#ifndef _LOONGARCH_CRASH_RESERVE_H
|
||||
#define _LOONGARCH_CRASH_RESERVE_H
|
||||
|
||||
#define CRASH_ALIGN SZ_2M
|
||||
|
||||
|
|
@ -7,6 +7,14 @@
|
|||
#ifndef __LOONGARCH_PERF_EVENT_H__
|
||||
#define __LOONGARCH_PERF_EVENT_H__
|
||||
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
#define perf_arch_bpf_user_pt_regs(regs) (struct user_pt_regs *)regs
|
||||
|
||||
#define perf_arch_fetch_caller_regs(regs, __ip) { \
|
||||
(regs)->csr_era = (__ip); \
|
||||
(regs)->regs[3] = current_stack_pointer; \
|
||||
(regs)->regs[22] = (unsigned long) __builtin_frame_address(0); \
|
||||
}
|
||||
|
||||
#endif /* __LOONGARCH_PERF_EVENT_H__ */
|
||||
|
|
|
|||
|
|
@ -132,8 +132,6 @@ static __always_inline void invtlb_all(u32 op, u32 info, u64 addr)
|
|||
);
|
||||
}
|
||||
|
||||
#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
|
||||
|
||||
static void tlb_flush(struct mmu_gather *tlb);
|
||||
|
||||
#define tlb_flush tlb_flush
|
||||
|
|
|
|||
|
|
@ -884,4 +884,4 @@ static int __init init_hw_perf_events(void)
|
|||
|
||||
return 0;
|
||||
}
|
||||
early_initcall(init_hw_perf_events);
|
||||
pure_initcall(init_hw_perf_events);
|
||||
|
|
|
|||
|
|
@ -202,10 +202,10 @@ static void __kprobes __do_page_fault(struct pt_regs *regs,
|
|||
if (!(vma->vm_flags & VM_WRITE))
|
||||
goto bad_area;
|
||||
} else {
|
||||
if (!(vma->vm_flags & VM_READ) && address != exception_era(regs))
|
||||
goto bad_area;
|
||||
if (!(vma->vm_flags & VM_EXEC) && address == exception_era(regs))
|
||||
goto bad_area;
|
||||
if (!(vma->vm_flags & (VM_READ | VM_WRITE)) && address != exception_era(regs))
|
||||
goto bad_area;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -197,6 +197,9 @@ static struct skcipher_alg algs[] = {
|
|||
|
||||
static int __init chacha_p10_init(void)
|
||||
{
|
||||
if (!cpu_has_feature(CPU_FTR_ARCH_31))
|
||||
return 0;
|
||||
|
||||
static_branch_enable(&have_p10);
|
||||
|
||||
return crypto_register_skciphers(algs, ARRAY_SIZE(algs));
|
||||
|
|
@ -204,10 +207,13 @@ static int __init chacha_p10_init(void)
|
|||
|
||||
static void __exit chacha_p10_exit(void)
|
||||
{
|
||||
if (!static_branch_likely(&have_p10))
|
||||
return;
|
||||
|
||||
crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
|
||||
}
|
||||
|
||||
module_cpu_feature_match(PPC_MODULE_FEATURE_P10, chacha_p10_init);
|
||||
module_init(chacha_p10_init);
|
||||
module_exit(chacha_p10_exit);
|
||||
|
||||
MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (P10 accelerated)");
|
||||
|
|
|
|||
|
|
@ -1285,15 +1285,14 @@ spapr_tce_platform_iommu_attach_dev(struct iommu_domain *platform_domain,
|
|||
struct device *dev)
|
||||
{
|
||||
struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
|
||||
struct iommu_group *grp = iommu_group_get(dev);
|
||||
struct iommu_table_group *table_group;
|
||||
struct iommu_group *grp;
|
||||
|
||||
/* At first attach the ownership is already set */
|
||||
if (!domain) {
|
||||
iommu_group_put(grp);
|
||||
if (!domain)
|
||||
return 0;
|
||||
}
|
||||
|
||||
grp = iommu_group_get(dev);
|
||||
table_group = iommu_group_get_iommudata(grp);
|
||||
/*
|
||||
* The domain being set to PLATFORM from earlier
|
||||
|
|
|
|||
|
|
@ -82,14 +82,14 @@ config ERRATA_THEAD
|
|||
|
||||
Otherwise, please say "N" here to avoid unnecessary overhead.
|
||||
|
||||
config ERRATA_THEAD_PBMT
|
||||
bool "Apply T-Head memory type errata"
|
||||
config ERRATA_THEAD_MAE
|
||||
bool "Apply T-Head's memory attribute extension (XTheadMae) errata"
|
||||
depends on ERRATA_THEAD && 64BIT && MMU
|
||||
select RISCV_ALTERNATIVE_EARLY
|
||||
default y
|
||||
help
|
||||
This will apply the memory type errata to handle the non-standard
|
||||
memory type bits in page-table-entries on T-Head SoCs.
|
||||
This will apply the memory attribute extension errata to handle the
|
||||
non-standard PTE utilization on T-Head SoCs (XTheadMae).
|
||||
|
||||
If you don't know what to do here, say "Y".
|
||||
|
||||
|
|
|
|||
|
|
@ -19,20 +19,26 @@
|
|||
#include <asm/patch.h>
|
||||
#include <asm/vendorid_list.h>
|
||||
|
||||
static bool errata_probe_pbmt(unsigned int stage,
|
||||
unsigned long arch_id, unsigned long impid)
|
||||
#define CSR_TH_SXSTATUS 0x5c0
|
||||
#define SXSTATUS_MAEE _AC(0x200000, UL)
|
||||
|
||||
static bool errata_probe_mae(unsigned int stage,
|
||||
unsigned long arch_id, unsigned long impid)
|
||||
{
|
||||
if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PBMT))
|
||||
if (!IS_ENABLED(CONFIG_ERRATA_THEAD_MAE))
|
||||
return false;
|
||||
|
||||
if (arch_id != 0 || impid != 0)
|
||||
return false;
|
||||
|
||||
if (stage == RISCV_ALTERNATIVES_EARLY_BOOT ||
|
||||
stage == RISCV_ALTERNATIVES_MODULE)
|
||||
return true;
|
||||
if (stage != RISCV_ALTERNATIVES_EARLY_BOOT &&
|
||||
stage != RISCV_ALTERNATIVES_MODULE)
|
||||
return false;
|
||||
|
||||
return false;
|
||||
if (!(csr_read(CSR_TH_SXSTATUS) & SXSTATUS_MAEE))
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -140,8 +146,8 @@ static u32 thead_errata_probe(unsigned int stage,
|
|||
{
|
||||
u32 cpu_req_errata = 0;
|
||||
|
||||
if (errata_probe_pbmt(stage, archid, impid))
|
||||
cpu_req_errata |= BIT(ERRATA_THEAD_PBMT);
|
||||
if (errata_probe_mae(stage, archid, impid))
|
||||
cpu_req_errata |= BIT(ERRATA_THEAD_MAE);
|
||||
|
||||
errata_probe_cmo(stage, archid, impid);
|
||||
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_ERRATA_THEAD
|
||||
#define ERRATA_THEAD_PBMT 0
|
||||
#define ERRATA_THEAD_MAE 0
|
||||
#define ERRATA_THEAD_PMU 1
|
||||
#define ERRATA_THEAD_NUMBER 2
|
||||
#endif
|
||||
|
|
@ -53,20 +53,20 @@ asm(ALTERNATIVE("sfence.vma %0", "sfence.vma", SIFIVE_VENDOR_ID, \
|
|||
* in the default case.
|
||||
*/
|
||||
#define ALT_SVPBMT_SHIFT 61
|
||||
#define ALT_THEAD_PBMT_SHIFT 59
|
||||
#define ALT_THEAD_MAE_SHIFT 59
|
||||
#define ALT_SVPBMT(_val, prot) \
|
||||
asm(ALTERNATIVE_2("li %0, 0\t\nnop", \
|
||||
"li %0, %1\t\nslli %0,%0,%3", 0, \
|
||||
RISCV_ISA_EXT_SVPBMT, CONFIG_RISCV_ISA_SVPBMT, \
|
||||
"li %0, %2\t\nslli %0,%0,%4", THEAD_VENDOR_ID, \
|
||||
ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
|
||||
ERRATA_THEAD_MAE, CONFIG_ERRATA_THEAD_MAE) \
|
||||
: "=r"(_val) \
|
||||
: "I"(prot##_SVPBMT >> ALT_SVPBMT_SHIFT), \
|
||||
"I"(prot##_THEAD >> ALT_THEAD_PBMT_SHIFT), \
|
||||
"I"(prot##_THEAD >> ALT_THEAD_MAE_SHIFT), \
|
||||
"I"(ALT_SVPBMT_SHIFT), \
|
||||
"I"(ALT_THEAD_PBMT_SHIFT))
|
||||
"I"(ALT_THEAD_MAE_SHIFT))
|
||||
|
||||
#ifdef CONFIG_ERRATA_THEAD_PBMT
|
||||
#ifdef CONFIG_ERRATA_THEAD_MAE
|
||||
/*
|
||||
* IO/NOCACHE memory types are handled together with svpbmt,
|
||||
* so on T-Head chips, check if no other memory type is set,
|
||||
|
|
@ -83,11 +83,11 @@ asm volatile(ALTERNATIVE( \
|
|||
"slli t3, t3, %3\n\t" \
|
||||
"or %0, %0, t3\n\t" \
|
||||
"2:", THEAD_VENDOR_ID, \
|
||||
ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
|
||||
ERRATA_THEAD_MAE, CONFIG_ERRATA_THEAD_MAE) \
|
||||
: "+r"(_val) \
|
||||
: "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
|
||||
"I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
|
||||
"I"(ALT_THEAD_PBMT_SHIFT) \
|
||||
: "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_MAE_SHIFT), \
|
||||
"I"(_PAGE_PMA_THEAD >> ALT_THEAD_MAE_SHIFT), \
|
||||
"I"(ALT_THEAD_MAE_SHIFT) \
|
||||
: "t3")
|
||||
#else
|
||||
#define ALT_THEAD_PMA(_val)
|
||||
|
|
|
|||
|
|
@ -89,7 +89,7 @@ typedef struct page *pgtable_t;
|
|||
#define PTE_FMT "%08lx"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
#if defined(CONFIG_64BIT) && defined(CONFIG_MMU)
|
||||
/*
|
||||
* We override this value as its generic definition uses __pa too early in
|
||||
* the boot process (before kernel_map.va_pa_offset is set).
|
||||
|
|
|
|||
|
|
@ -896,7 +896,7 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)
|
|||
#define PAGE_SHARED __pgprot(0)
|
||||
#define PAGE_KERNEL __pgprot(0)
|
||||
#define swapper_pg_dir NULL
|
||||
#define TASK_SIZE 0xffffffffUL
|
||||
#define TASK_SIZE _AC(-1, UL)
|
||||
#define VMALLOC_START _AC(0, UL)
|
||||
#define VMALLOC_END TASK_SIZE
|
||||
|
||||
|
|
|
|||
|
|
@ -54,7 +54,7 @@ struct riscv_hwprobe {
|
|||
#define RISCV_HWPROBE_EXT_ZFHMIN (1 << 28)
|
||||
#define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29)
|
||||
#define RISCV_HWPROBE_EXT_ZVFH (1 << 30)
|
||||
#define RISCV_HWPROBE_EXT_ZVFHMIN (1 << 31)
|
||||
#define RISCV_HWPROBE_EXT_ZVFHMIN (1ULL << 31)
|
||||
#define RISCV_HWPROBE_EXT_ZFA (1ULL << 32)
|
||||
#define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33)
|
||||
#define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34)
|
||||
|
|
|
|||
|
|
@ -231,7 +231,7 @@ static void __init setup_bootmem(void)
|
|||
* In 64-bit, any use of __va/__pa before this point is wrong as we
|
||||
* did not know the start of DRAM before.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_64BIT))
|
||||
if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_MMU))
|
||||
kernel_map.va_pa_offset = PAGE_OFFSET - phys_ram_base;
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -340,7 +340,8 @@ SYM_CODE_START(pgm_check_handler)
|
|||
mvc __PT_LAST_BREAK(8,%r11),__LC_PGM_LAST_BREAK
|
||||
stctg %c1,%c1,__PT_CR1(%r11)
|
||||
#if IS_ENABLED(CONFIG_KVM)
|
||||
lg %r12,__LC_GMAP
|
||||
ltg %r12,__LC_GMAP
|
||||
jz 5f
|
||||
clc __GMAP_ASCE(8,%r12), __PT_CR1(%r11)
|
||||
jne 5f
|
||||
BPENTER __SF_SIE_FLAGS(%r10),_TIF_ISOLATE_BP_GUEST
|
||||
|
|
|
|||
|
|
@ -255,6 +255,71 @@ __visible noinstr void do_int80_emulation(struct pt_regs *regs)
|
|||
instrumentation_end();
|
||||
syscall_exit_to_user_mode(regs);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_FRED
|
||||
/*
|
||||
* A FRED-specific INT80 handler is warranted for the follwing reasons:
|
||||
*
|
||||
* 1) As INT instructions and hardware interrupts are separate event
|
||||
* types, FRED does not preclude the use of vector 0x80 for external
|
||||
* interrupts. As a result, the FRED setup code does not reserve
|
||||
* vector 0x80 and calling int80_is_external() is not merely
|
||||
* suboptimal but actively incorrect: it could cause a system call
|
||||
* to be incorrectly ignored.
|
||||
*
|
||||
* 2) It is called only for handling vector 0x80 of event type
|
||||
* EVENT_TYPE_SWINT and will never be called to handle any external
|
||||
* interrupt (event type EVENT_TYPE_EXTINT).
|
||||
*
|
||||
* 3) FRED has separate entry flows depending on if the event came from
|
||||
* user space or kernel space, and because the kernel does not use
|
||||
* INT insns, the FRED kernel entry handler fred_entry_from_kernel()
|
||||
* falls through to fred_bad_type() if the event type is
|
||||
* EVENT_TYPE_SWINT, i.e., INT insns. So if the kernel is handling
|
||||
* an INT insn, it can only be from a user level.
|
||||
*
|
||||
* 4) int80_emulation() does a CLEAR_BRANCH_HISTORY. While FRED will
|
||||
* likely take a different approach if it is ever needed: it
|
||||
* probably belongs in either fred_intx()/ fred_other() or
|
||||
* asm_fred_entrypoint_user(), depending on if this ought to be done
|
||||
* for all entries from userspace or only system
|
||||
* calls.
|
||||
*
|
||||
* 5) INT $0x80 is the fast path for 32-bit system calls under FRED.
|
||||
*/
|
||||
DEFINE_FREDENTRY_RAW(int80_emulation)
|
||||
{
|
||||
int nr;
|
||||
|
||||
enter_from_user_mode(regs);
|
||||
|
||||
instrumentation_begin();
|
||||
add_random_kstack_offset();
|
||||
|
||||
/*
|
||||
* FRED pushed 0 into regs::orig_ax and regs::ax contains the
|
||||
* syscall number.
|
||||
*
|
||||
* User tracing code (ptrace or signal handlers) might assume
|
||||
* that the regs::orig_ax contains a 32-bit number on invoking
|
||||
* a 32-bit syscall.
|
||||
*
|
||||
* Establish the syscall convention by saving the 32bit truncated
|
||||
* syscall number in regs::orig_ax and by invalidating regs::ax.
|
||||
*/
|
||||
regs->orig_ax = regs->ax & GENMASK(31, 0);
|
||||
regs->ax = -ENOSYS;
|
||||
|
||||
nr = syscall_32_enter(regs);
|
||||
|
||||
local_irq_enable();
|
||||
nr = syscall_enter_from_user_mode_work(regs, nr);
|
||||
do_syscall_32_irqs_on(regs, nr);
|
||||
|
||||
instrumentation_end();
|
||||
syscall_exit_to_user_mode(regs);
|
||||
}
|
||||
#endif
|
||||
#else /* CONFIG_IA32_EMULATION */
|
||||
|
||||
/* Handles int $0x80 on a 32bit kernel */
|
||||
|
|
|
|||
|
|
@ -28,9 +28,9 @@ static noinstr void fred_bad_type(struct pt_regs *regs, unsigned long error_code
|
|||
if (regs->fred_cs.sl > 0) {
|
||||
pr_emerg("PANIC: invalid or fatal FRED event; event type %u "
|
||||
"vector %u error 0x%lx aux 0x%lx at %04x:%016lx\n",
|
||||
regs->fred_ss.type, regs->fred_ss.vector, regs->orig_ax,
|
||||
regs->fred_ss.type, regs->fred_ss.vector, error_code,
|
||||
fred_event_data(regs), regs->cs, regs->ip);
|
||||
die("invalid or fatal FRED event", regs, regs->orig_ax);
|
||||
die("invalid or fatal FRED event", regs, error_code);
|
||||
panic("invalid or fatal FRED event");
|
||||
} else {
|
||||
unsigned long flags = oops_begin();
|
||||
|
|
@ -38,10 +38,10 @@ static noinstr void fred_bad_type(struct pt_regs *regs, unsigned long error_code
|
|||
|
||||
pr_alert("BUG: invalid or fatal FRED event; event type %u "
|
||||
"vector %u error 0x%lx aux 0x%lx at %04x:%016lx\n",
|
||||
regs->fred_ss.type, regs->fred_ss.vector, regs->orig_ax,
|
||||
regs->fred_ss.type, regs->fred_ss.vector, error_code,
|
||||
fred_event_data(regs), regs->cs, regs->ip);
|
||||
|
||||
if (__die("Invalid or fatal FRED event", regs, regs->orig_ax))
|
||||
if (__die("Invalid or fatal FRED event", regs, error_code))
|
||||
sig = 0;
|
||||
|
||||
oops_end(flags, regs, sig);
|
||||
|
|
@ -66,7 +66,7 @@ static noinstr void fred_intx(struct pt_regs *regs)
|
|||
/* INT80 */
|
||||
case IA32_SYSCALL_VECTOR:
|
||||
if (ia32_enabled())
|
||||
return int80_emulation(regs);
|
||||
return fred_int80_emulation(regs);
|
||||
fallthrough;
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -1693,6 +1693,7 @@ void x86_perf_get_lbr(struct x86_pmu_lbr *lbr)
|
|||
lbr->from = x86_pmu.lbr_from;
|
||||
lbr->to = x86_pmu.lbr_to;
|
||||
lbr->info = x86_pmu.lbr_info;
|
||||
lbr->has_callstack = x86_pmu_has_lbr_callstack();
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(x86_perf_get_lbr);
|
||||
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue