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drm/amd/display: updated wm table for Renoir
[Why] For certain timings, Renoir may underflow due to sr exit latency being too slow. [How] Updated wm table for renoir. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -731,32 +731,32 @@ static struct wm_table ddr4_wm_table_rn = {
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.wm_inst = WM_A,
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.wm_type = WM_TYPE_PSTATE_CHG,
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.pstate_latency_us = 11.72,
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.sr_exit_time_us = 9.09,
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.sr_enter_plus_exit_time_us = 10.14,
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.sr_exit_time_us = 11.90,
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.sr_enter_plus_exit_time_us = 12.80,
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.valid = true,
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},
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{
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.wm_inst = WM_B,
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.wm_type = WM_TYPE_PSTATE_CHG,
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.pstate_latency_us = 11.72,
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.sr_exit_time_us = 11.12,
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.sr_enter_plus_exit_time_us = 12.48,
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.sr_exit_time_us = 13.18,
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.sr_enter_plus_exit_time_us = 14.30,
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.valid = true,
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},
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{
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.wm_inst = WM_C,
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.wm_type = WM_TYPE_PSTATE_CHG,
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.pstate_latency_us = 11.72,
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.sr_exit_time_us = 11.12,
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.sr_enter_plus_exit_time_us = 12.48,
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.sr_exit_time_us = 13.18,
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.sr_enter_plus_exit_time_us = 14.30,
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.valid = true,
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},
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{
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.wm_inst = WM_D,
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.wm_type = WM_TYPE_PSTATE_CHG,
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.pstate_latency_us = 11.72,
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.sr_exit_time_us = 11.12,
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.sr_enter_plus_exit_time_us = 12.48,
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.sr_exit_time_us = 13.18,
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.sr_enter_plus_exit_time_us = 14.30,
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.valid = true,
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},
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}
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