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spi: xilinx: add force_irq for QSPI mode
Xilinx PG158 page 80 [1] states that master transaction inhibit bit must be set to properly setup the transaction in QSPI mode. Add the force_irq flag to follow this sequence. [1] https://docs.xilinx.com/r/en-US/pg153-axi-quad-spi/Dual/Quad-SPI-Mode-Transactions Signed-off-by: Vadim Fedorenko <vadfed@meta.com> Link: https://lore.kernel.org/r/20230214135928.1253205-1-vadfed@meta.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -83,7 +83,7 @@ struct xilinx_spi {
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void __iomem *regs; /* virt. address of the control registers */
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int irq;
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bool force_irq; /* force irq to setup master inhibit */
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u8 *rx_ptr; /* pointer in the Tx buffer */
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const u8 *tx_ptr; /* pointer in the Rx buffer */
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u8 bytes_per_word;
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@ -248,7 +248,8 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
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xspi->rx_ptr = t->rx_buf;
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remaining_words = t->len / xspi->bytes_per_word;
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if (xspi->irq >= 0 && remaining_words > xspi->buffer_size) {
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if (xspi->irq >= 0 &&
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(xspi->force_irq || remaining_words > xspi->buffer_size)) {
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u32 isr;
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use_irq = true;
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/* Inhibit irq to avoid spurious irqs on tx_empty*/
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@ -393,6 +394,7 @@ static int xilinx_spi_probe(struct platform_device *pdev)
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struct resource *res;
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int ret, num_cs = 0, bits_per_word;
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struct spi_master *master;
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bool force_irq = false;
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u32 tmp;
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u8 i;
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@ -400,6 +402,7 @@ static int xilinx_spi_probe(struct platform_device *pdev)
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if (pdata) {
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num_cs = pdata->num_chipselect;
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bits_per_word = pdata->bits_per_word;
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force_irq = pdata->force_irq;
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} else {
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of_property_read_u32(pdev->dev.of_node, "xlnx,num-ss-bits",
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&num_cs);
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@ -477,6 +480,8 @@ static int xilinx_spi_probe(struct platform_device *pdev)
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dev_name(&pdev->dev), xspi);
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if (ret)
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return ret;
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xspi->force_irq = force_irq;
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}
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/* SPI controller initializations */
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@ -15,6 +15,7 @@ struct xspi_platform_data {
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u8 bits_per_word;
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struct spi_board_info *devices;
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u8 num_devices;
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bool force_irq;
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};
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#endif /* __LINUX_SPI_XILINX_SPI_H */
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