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drm/radeon: add indirect register accessors for SMC registers
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cc066715e6
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2 changed files with 21 additions and 0 deletions
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@ -24,6 +24,10 @@
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#ifndef __EVERGREEN_REG_H__
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#define __EVERGREEN_REG_H__
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/* trinity */
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#define TN_SMC_IND_INDEX_0 0x200
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#define TN_SMC_IND_DATA_0 0x204
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/* evergreen */
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#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS 0x310
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#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH 0x324
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@ -1806,6 +1806,8 @@ void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v);
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#define WREG32_PCIE(reg, v) rv370_pcie_wreg(rdev, (reg), (v))
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#define RREG32_PCIE_PORT(reg) rdev->pciep_rreg(rdev, (reg))
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#define WREG32_PCIE_PORT(reg, v) rdev->pciep_wreg(rdev, (reg), (v))
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#define RREG32_SMC(reg) tn_smc_rreg(rdev, (reg))
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#define WREG32_SMC(reg, v) tn_smc_wreg(rdev, (reg), (v))
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#define WREG32_P(reg, val, mask) \
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do { \
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uint32_t tmp_ = RREG32(reg); \
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@ -1844,6 +1846,21 @@ static inline void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uin
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WREG32(RADEON_PCIE_DATA, (v));
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}
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static inline u32 tn_smc_rreg(struct radeon_device *rdev, u32 reg)
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{
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u32 r;
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WREG32(TN_SMC_IND_INDEX_0, (reg));
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r = RREG32(TN_SMC_IND_DATA_0);
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return r;
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}
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static inline void tn_smc_wreg(struct radeon_device *rdev, u32 reg, u32 v)
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{
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WREG32(TN_SMC_IND_INDEX_0, (reg));
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WREG32(TN_SMC_IND_DATA_0, (v));
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}
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void r100_pll_errata_after_index(struct radeon_device *rdev);
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