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mlxsw: reg: Add egr_et_set field to SPVID

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SPVID.egr_et_set=1 means that when VLAN is pushed at ingress (for untagged
packets or for QinQ push mode) then the EtherType is decided at the egress
port.

The next patches will use this field for VxLAN devices (tunnel port) in
order to allow using dual VxLAN bridges (802.1d and 802.1ad at the same
time).

Signed-off-by: Amit Cohen <amcohen@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Amit Cohen 2021-03-17 12:35:23 +02:00 committed by David S. Miller
parent 07bcf68551
commit 1b35293b7a
1 changed files with 9 additions and 0 deletions
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9
drivers/net/ethernet/mellanox/mlxsw/reg.h
View file

@ -842,6 +842,14 @@ MLXSW_ITEM32(reg, spvid, local_port, 0x00, 16, 8);
*/
MLXSW_ITEM32(reg, spvid, sub_port, 0x00, 8, 8);
/* reg_spvid_egr_et_set
* When VLAN is pushed at ingress (for untagged packets or for
* QinQ push mode) then the EtherType is decided at the egress port.
* Reserved when Spectrum-1.
* Access: RW
*/
MLXSW_ITEM32(reg, spvid, egr_et_set, 0x04, 24, 1);
/* reg_spvid_et_vlan
* EtherType used for when VLAN is pushed at ingress (for untagged
* packets or for QinQ push mode).
@ -849,6 +857,7 @@ MLXSW_ITEM32(reg, spvid, sub_port, 0x00, 8, 8);
* 1: ether_type1
* 2: ether_type2 - Reserved when Spectrum-1, supported by Spectrum-2
* Ethertype IDs are configured by SVER.
* Reserved when egr_et_set = 1.
* Access: RW
*/
MLXSW_ITEM32(reg, spvid, et_vlan, 0x04, 16, 2);