mirror of
https://github.com/torvalds/linux
synced 2024-09-06 18:01:05 +00:00
- added support for OpeneEmbed SOM9331 board
- Ingenic fixes/improvments - other fixes and cleanups -----BEGIN PGP SIGNATURE----- iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmDdyJQaHHRzYm9nZW5k QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHBlyRAAhj5dC1EyGsc0cWyzC8ZU Nh45vzMCSxa4mxAelNjuVKdE0h7gLeRa8/sKPV+EcS3ZFcSfZQeIHEbH9Na3EDS7 KtUZmkjrHCDdRTh7kou7E7mb716HvoQEyq6d1VyZOahyqf2ZcjIsFinK+As+4wBV JcXJMcpUWemI4Ojm8cbmNWQW3V2Ty9qLNUa6BpmntbdOdYowTih9QWHv2u1YsOR7 R6LJXdyo6V1RieeqfZaWXTQtN8yyXYhBewLIy0DxBAm329f5sRHUVd9/ZD2RMByD 1weEhbs0jhmYZFSfkwZ8SjAb4GkusjNTnDiK4Rsuz6pQK0BIGNAV0Mrnedq+i5eD wrrTI1/envStDpj9XGlSNajcaQGpTza1V1uaCIm4EanOMMTBc8DTXaj7MCOlTD8j fkNE3ykfloVSSzZAWCmcpV9fBsFwQp3m+cWrtIAAnOJDK+NV5FfABUwFHKnBUpxG YOUNCed0WJFx++xrHKylt8hWILLEATLHh1h5vDsEYJi4gwt2KxCSYQBGgSYKa1At tOUa5UINTMvpe4U9GEjHh6f1VedtUNYUzXjD5g2cn62d81RCSx3hB1KkfQSKtaDw H9sR8d+rDFt4fK9T/HPZ3EyM2i9FkZNv+CulfGNd3M0vnF8+qX2xRehWrqhwBBi0 2p7V9/t5TPhziAfJySKX+Jg= =j2kH -----END PGP SIGNATURE----- Merge tag 'mips_5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - add support for OpeneEmbed SOM9331 board - Ingenic fixes/improvments - other fixes and cleanups * tag 'mips_5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (39 commits) MIPS: Fix PKMAP with 32-bit MIPS huge page support MIPS: CI20: Add second percpu timer for SMP. MIPS: CI20: Reduce clocksource to 750 kHz. MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs. dt-bindings: clock: Add documentation for MAC PHY control bindings. MIPS: X1830: Respect cell count of common properties. MIPS: set mips32r5 for virt extensions MIPS: loongsoon64: Reserve memory below starting pfn to prevent Oops MIPS: MT extensions are not available on MIPS32r1 mips/kvm: Use BUG_ON instead of if condition followed by BUG MIPS: OCTEON: octeon-usb: Use devm_platform_get_and_ioremap_resource() MIPS: add PMD table accounting into MIPS'pmd_alloc_one MIPS: Loongson64: fix spelling of SPDX tag MIPS: ingenic: rs90: Add dedicated VRAM memory region MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B) MIPS: boot: Support specifying UART port on Ingenic SoCs ...
This commit is contained in:
Linus Torvalds
commit
19b4385922
|
|
@ -97,6 +97,8 @@ required:
|
|||
patternProperties:
|
||||
"^usb-phy@[a-f0-9]+$":
|
||||
allOf: [ $ref: "../phy/ingenic,phy-usb.yaml#" ]
|
||||
"^mac-phy-ctrl@[a-f0-9]+$":
|
||||
allOf: [ $ref: "../net/ingenic,mac.yaml#" ]
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -830,6 +830,8 @@ patternProperties:
|
|||
description: Opal Kelly Incorporated
|
||||
"^opencores,.*":
|
||||
description: OpenCores.org
|
||||
"^openembed,.*":
|
||||
description: OpenEmbed
|
||||
"^openrisc,.*":
|
||||
description: OpenRISC.io
|
||||
"^option,.*":
|
||||
|
|
|
|||
|
|
@ -112,6 +112,7 @@ config MACH_INGENIC
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|||
select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_SUPPORTS_ZBOOT
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select DMA_NONCOHERENT
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||||
select ARCH_HAS_SYNC_DMA_FOR_CPU
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select IRQ_MIPS_CPU
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||||
select PINCTRL
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select GPIOLIB
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||||
|
|
@ -427,6 +428,8 @@ config MACH_INGENIC_SOC
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select MIPS_GENERIC
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select MACH_INGENIC
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select SYS_SUPPORTS_ZBOOT_UART16550
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select CPU_SUPPORTS_CPUFREQ
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select MIPS_EXTERNAL_TIMER
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||||
|
||||
config LANTIQ
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||||
bool "Lantiq based platforms"
|
||||
|
|
@ -994,7 +997,6 @@ config CAVIUM_OCTEON_SOC
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|||
select HAVE_PLAT_FW_INIT_CMDLINE
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||||
select HAVE_PLAT_MEMCPY
|
||||
select ZONE_DMA32
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||||
select HOLES_IN_ZONE
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select GPIOLIB
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select USE_OF
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select ARCH_SPARSEMEM_ENABLE
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||||
|
|
@ -1231,9 +1233,6 @@ config HAVE_PLAT_MEMCPY
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config ISA_DMA_API
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bool
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||||
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||||
config HOLES_IN_ZONE
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||||
bool
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||||
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||||
config SYS_SUPPORTS_RELOCATABLE
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||||
bool
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||||
help
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||||
|
|
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|||
|
|
@ -102,6 +102,14 @@ config DEBUG_ZBOOT
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|||
to reduce the kernel image size and speed up the booting procedure a
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||||
little.
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||||
|
||||
config ZBOOT_INGENIC_UART
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||||
int "UART to use for compressed kernel debugging"
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||||
depends on DEBUG_ZBOOT && MACH_INGENIC_SOC
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||||
default 0
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||||
range 0 4
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||||
help
|
||||
Specify the UART that should be used for compressed kernel debugging.
|
||||
|
||||
config SPINLOCK_TEST
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||||
bool "Enable spinlock timing tests in debugfs"
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||||
depends on DEBUG_FS
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||||
|
|
|
|||
|
|
@ -19,8 +19,8 @@
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|||
#endif
|
||||
|
||||
#ifdef CONFIG_MACH_INGENIC
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||||
#define INGENIC_UART0_BASE_ADDR 0x10030000
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||||
#define PORT(offset) (CKSEG1ADDR(INGENIC_UART0_BASE_ADDR) + (4 * offset))
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||||
#define INGENIC_UART_BASE_ADDR (0x10030000 + 0x1000 * CONFIG_ZBOOT_INGENIC_UART)
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||||
#define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset))
|
||||
#endif
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||||
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||||
#ifdef CONFIG_CPU_XLR
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||||
|
|
|
|||
|
|
@ -118,6 +118,20 @@ &cgu {
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|||
assigned-clock-rates = <48000000>;
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};
|
||||
|
||||
&tcu {
|
||||
/*
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* 750 kHz for the system timers and clocksource,
|
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* use channel #0 and #1 for the per cpu system timers,
|
||||
* and use channel #2 for the clocksource.
|
||||
*
|
||||
* 3000 kHz for the OST timer to provide a higher
|
||||
* precision clocksource.
|
||||
*/
|
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assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
|
||||
<&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>;
|
||||
assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>;
|
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};
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||||
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||||
&mmc0 {
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||||
status = "okay";
|
||||
|
||||
|
|
@ -522,13 +536,3 @@ pins_mmc1: mmc1 {
|
|||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
&tcu {
|
||||
/*
|
||||
* 750 kHz for the system timer and 3 MHz for the clocksource,
|
||||
* use channel #0 for the system timer, #1 for the clocksource.
|
||||
*/
|
||||
assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
|
||||
<&tcu TCU_CLK_OST>;
|
||||
assigned-clock-rates = <750000>, <3000000>, <3000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -74,7 +74,6 @@ sound {
|
|||
simple-audio-card,widgets =
|
||||
"Speaker", "Speaker",
|
||||
"Headphone", "Headphones",
|
||||
"Line", "FM Radio",
|
||||
"Microphone", "Built-in Mic";
|
||||
simple-audio-card,routing =
|
||||
"Headphones Amp INL", "LHPOUT",
|
||||
|
|
@ -85,8 +84,8 @@ sound {
|
|||
"Speaker Amp INR", "ROUT",
|
||||
"Speaker", "Speaker Amp OUTL",
|
||||
"Speaker", "Speaker Amp OUTR",
|
||||
"LLINEIN", "FM Radio",
|
||||
"RLINEIN", "FM Radio",
|
||||
"LLINEIN", "Cap-less",
|
||||
"RLINEIN", "Cap-less",
|
||||
"Built-in Mic", "MICBIAS",
|
||||
"MIC1P", "Built-in Mic",
|
||||
"MIC1N", "Built-in Mic";
|
||||
|
|
|
|||
|
|
@ -339,7 +339,7 @@ uart4: serial@10034000 {
|
|||
};
|
||||
|
||||
i2c0: i2c@10050000 {
|
||||
compatible = "ingenic,jz4780-i2c";
|
||||
compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
|
|
@ -357,7 +357,7 @@ i2c0: i2c@10050000 {
|
|||
};
|
||||
|
||||
i2c1: i2c@10051000 {
|
||||
compatible = "ingenic,jz4780-i2c";
|
||||
compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x10051000 0x1000>;
|
||||
|
|
@ -374,7 +374,7 @@ i2c1: i2c@10051000 {
|
|||
};
|
||||
|
||||
i2c2: i2c@10052000 {
|
||||
compatible = "ingenic,jz4780-i2c";
|
||||
compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x10052000 0x1000>;
|
||||
|
|
@ -391,7 +391,7 @@ i2c2: i2c@10052000 {
|
|||
};
|
||||
|
||||
i2c3: i2c@10053000 {
|
||||
compatible = "ingenic,jz4780-i2c";
|
||||
compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x10053000 0x1000>;
|
||||
|
|
@ -408,7 +408,7 @@ i2c3: i2c@10053000 {
|
|||
};
|
||||
|
||||
i2c4: i2c@10054000 {
|
||||
compatible = "ingenic,jz4780-i2c";
|
||||
compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x10054000 0x1000>;
|
||||
|
|
|
|||
|
|
@ -16,6 +16,18 @@ memory {
|
|||
reg = <0x0 0x2000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
vmem: video-memory@1f00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x1f00000 0x100000>;
|
||||
reusable;
|
||||
};
|
||||
};
|
||||
|
||||
vcc: regulator {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
|
|
@ -300,6 +312,8 @@ &tcu {
|
|||
};
|
||||
|
||||
&lcd {
|
||||
memory-region = <&vmem>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pins_lcd>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ rng: rng@d8 {
|
|||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mac_phy_ctrl: mac-phy-ctrl@e8 {
|
||||
compatible = "syscon";
|
||||
reg = <0xe8 0x4>;
|
||||
};
|
||||
};
|
||||
|
||||
ost: timer@12000000 {
|
||||
|
|
@ -347,6 +352,8 @@ mac: ethernet@134b0000 {
|
|||
clocks = <&cgu X1000_CLK_MAC>;
|
||||
clock-names = "stmmaceth";
|
||||
|
||||
mode-reg = <&mac_phy_ctrl>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
mdio: mdio {
|
||||
|
|
|
|||
|
|
@ -73,6 +73,11 @@ otg_phy: usb-phy@3c {
|
|||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mac_phy_ctrl: mac-phy-ctrl@e8 {
|
||||
compatible = "syscon";
|
||||
reg = <0xe8 0x4>;
|
||||
};
|
||||
};
|
||||
|
||||
ost: timer@12000000 {
|
||||
|
|
@ -97,9 +102,9 @@ tcu: timer@10002000 {
|
|||
|
||||
#clock-cells = <1>;
|
||||
|
||||
clocks = <&cgu X1830_CLK_RTCLK
|
||||
&cgu X1830_CLK_EXCLK
|
||||
&cgu X1830_CLK_PCLK>;
|
||||
clocks = <&cgu X1830_CLK_RTCLK>,
|
||||
<&cgu X1830_CLK_EXCLK>,
|
||||
<&cgu X1830_CLK_PCLK>;
|
||||
clock-names = "rtc", "ext", "pclk";
|
||||
|
||||
interrupt-controller;
|
||||
|
|
@ -274,8 +279,7 @@ dtrng: trng@10072000 {
|
|||
|
||||
pdma: dma-controller@13420000 {
|
||||
compatible = "ingenic,x1830-dma";
|
||||
reg = <0x13420000 0x400
|
||||
0x13421000 0x40>;
|
||||
reg = <0x13420000 0x400>, <0x13421000 0x40>;
|
||||
#dma-cells = <2>;
|
||||
|
||||
interrupt-parent = <&intc>;
|
||||
|
|
@ -337,6 +341,8 @@ mac: ethernet@134b0000 {
|
|||
clocks = <&cgu X1830_CLK_MAC>;
|
||||
clock-names = "stmmaceth";
|
||||
|
||||
mode-reg = <&mac_phy_ctrl>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
mdio: mdio {
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
# SPDX_License_Identifier: GPL_2.0
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
dtb-$(CONFIG_MACH_LOONGSON64) += loongson64_2core_2k1000.dtb
|
||||
dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_ls7a.dtb
|
||||
dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_rs780e.dtb
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@ cpu0: cpu@0 {
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@200000 {
|
||||
compatible = "memory";
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
|
||||
|
|
@ -209,8 +209,8 @@ pci_bridge@9,0 {
|
|||
};
|
||||
|
||||
pci_bridge@a,0 {
|
||||
compatible = "pci0014,7a19.0",
|
||||
"pci0014,7a19",
|
||||
compatible = "pci0014,7a09.0",
|
||||
"pci0014,7a09",
|
||||
"pciclass060400",
|
||||
"pciclass0604";
|
||||
|
||||
|
|
@ -224,8 +224,8 @@ pci_bridge@a,0 {
|
|||
};
|
||||
|
||||
pci_bridge@b,0 {
|
||||
compatible = "pci0014,7a19.0",
|
||||
"pci0014,7a19",
|
||||
compatible = "pci0014,7a09.0",
|
||||
"pci0014,7a09",
|
||||
"pciclass060400",
|
||||
"pciclass0604";
|
||||
|
||||
|
|
@ -239,8 +239,8 @@ pci_bridge@b,0 {
|
|||
};
|
||||
|
||||
pci_bridge@c,0 {
|
||||
compatible = "pci0014,7a19.0",
|
||||
"pci0014,7a19",
|
||||
compatible = "pci0014,7a09.0",
|
||||
"pci0014,7a09",
|
||||
"pciclass060400",
|
||||
"pciclass0604";
|
||||
|
||||
|
|
@ -269,8 +269,8 @@ pci_bridge@d,0 {
|
|||
};
|
||||
|
||||
pci_bridge@e,0 {
|
||||
compatible = "pci0014,7a19.0",
|
||||
"pci0014,7a19",
|
||||
compatible = "pci0014,7a09.0",
|
||||
"pci0014,7a09",
|
||||
"pciclass060400",
|
||||
"pciclass0604";
|
||||
|
||||
|
|
|
|||
|
|
@ -39,7 +39,7 @@ liointc: interrupt-controller@3ff01400 {
|
|||
|
||||
};
|
||||
|
||||
cpu_uart0: serial@1fe001e0 {
|
||||
cpu_uart0: serial@1fe00100 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0 0x1fe00100 0x10>;
|
||||
clock-frequency = <100000000>;
|
||||
|
|
@ -48,7 +48,7 @@ cpu_uart0: serial@1fe001e0 {
|
|||
no-loopback-test;
|
||||
};
|
||||
|
||||
cpu_uart1: serial@1fe001e8 {
|
||||
cpu_uart1: serial@1fe00110 {
|
||||
status = "disabled";
|
||||
compatible = "ns16550a";
|
||||
reg = <0 0x1fe00110 0x10>;
|
||||
|
|
|
|||
|
|
@ -88,7 +88,7 @@ pci@1a000000 {
|
|||
interrupt-map-mask = <0x1800 0x0 0x0 0x7>;
|
||||
};
|
||||
|
||||
isa {
|
||||
isa@18000000 {
|
||||
compatible = "isa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -409,7 +409,7 @@ pci_bridge@14,0 {
|
|||
};
|
||||
};
|
||||
|
||||
isa {
|
||||
isa@18000000 {
|
||||
compatible = "isa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@ pci@1a000000 {
|
|||
<0x02000000 0 0x40000000 0 0x40000000 0 0x40000000>;
|
||||
};
|
||||
|
||||
isa {
|
||||
isa@18000000 {
|
||||
compatible = "isa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -244,7 +244,7 @@ uart1: uart@1f000800 {
|
|||
no-loopback-test;
|
||||
};
|
||||
|
||||
eth@1f010000 {
|
||||
ethernet@1f010000 {
|
||||
compatible = "smsc,lan9115";
|
||||
reg = <0x1f010000 0x10000>;
|
||||
reg-io-width = <4>;
|
||||
|
|
|
|||
|
|
@ -4,4 +4,5 @@ dtb-$(CONFIG_ATH79) += ar9132_tl_wr1043nd_v1.dtb
|
|||
dtb-$(CONFIG_ATH79) += ar9331_dpt_module.dtb
|
||||
dtb-$(CONFIG_ATH79) += ar9331_dragino_ms14.dtb
|
||||
dtb-$(CONFIG_ATH79) += ar9331_omega.dtb
|
||||
dtb-$(CONFIG_ATH79) += ar9331_openembed_som9331_board.dtb
|
||||
dtb-$(CONFIG_ATH79) += ar9331_tl_mr3020.dtb
|
||||
|
|
|
|||
|
|
@ -148,6 +148,7 @@ eth1: ethernet@1a000000 {
|
|||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
|
||||
mdio {
|
||||
|
|
@ -183,6 +184,7 @@ switch_port0: port@0 {
|
|||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
110
arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts
Normal file
110
arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts
Normal file
|
|
@ -0,0 +1,110 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
#include "ar9331.dtsi"
|
||||
|
||||
/ {
|
||||
model = "OpenEmbed SOM9331 Board";
|
||||
compatible = "openembed,som9331";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart;
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x4000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
button@0 {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ref {
|
||||
clock-frequency = <25000000>;
|
||||
};
|
||||
|
||||
&uart {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi {
|
||||
num-chipselects = <1>;
|
||||
status = "okay";
|
||||
|
||||
/* Winbond 25Q64FVSIG SPI flash */
|
||||
spiflash: w25q64@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "winbond,w25q64", "jedec,spi-nor";
|
||||
spi-max-frequency = <104000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&switch_port1 {
|
||||
label = "lan0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&switch_port3 {
|
||||
label = "lan1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&phy_port0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&phy_port2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&phy_port4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -516,20 +516,13 @@ static int __init dwc3_octeon_device_init(void)
|
|||
if (!pdev)
|
||||
return -ENODEV;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (res == NULL) {
|
||||
put_device(&pdev->dev);
|
||||
dev_err(&pdev->dev, "No memory resources\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
/*
|
||||
* The code below maps in the registers necessary for
|
||||
* setting up the clocks and reseting PHYs. We must
|
||||
* release the resources so the dwc3 subsystem doesn't
|
||||
* know the difference.
|
||||
*/
|
||||
base = devm_ioremap_resource(&pdev->dev, res);
|
||||
base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
|
||||
if (IS_ERR(base)) {
|
||||
put_device(&pdev->dev);
|
||||
return PTR_ERR(base);
|
||||
|
|
|
|||
|
|
@ -13,7 +13,6 @@ CONFIG_TASK_DELAY_ACCT=y
|
|||
CONFIG_TASK_XACCT=y
|
||||
CONFIG_TASK_IO_ACCOUNTING=y
|
||||
CONFIG_MEMCG=y
|
||||
CONFIG_MEMCG_SWAP=y
|
||||
CONFIG_BLK_CGROUP=y
|
||||
CONFIG_CGROUP_PIDS=y
|
||||
CONFIG_CGROUP_FREEZER=y
|
||||
|
|
@ -31,9 +30,8 @@ CONFIG_EMBEDDED=y
|
|||
CONFIG_PERF_EVENTS=y
|
||||
CONFIG_MACH_LOONGSON64=y
|
||||
CONFIG_CPU_HAS_MSA=y
|
||||
CONFIG_NR_CPUS=16
|
||||
CONFIG_NUMA=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_NR_CPUS=16
|
||||
CONFIG_HZ_256=y
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_MIPS32_O32=y
|
||||
|
|
@ -206,7 +204,6 @@ CONFIG_VIRTIO_NET=m
|
|||
# CONFIG_NET_VENDOR_DEC is not set
|
||||
# CONFIG_NET_VENDOR_DLINK is not set
|
||||
# CONFIG_NET_VENDOR_EMULEX is not set
|
||||
# CONFIG_NET_VENDOR_HP is not set
|
||||
# CONFIG_NET_VENDOR_I825XX is not set
|
||||
CONFIG_E1000=y
|
||||
CONFIG_E1000E=y
|
||||
|
|
@ -248,7 +245,6 @@ CONFIG_PPP_ASYNC=m
|
|||
CONFIG_PPP_SYNC_TTY=m
|
||||
CONFIG_ATH9K=m
|
||||
CONFIG_HOSTAP=m
|
||||
CONFIG_INPUT_POLLDEV=m
|
||||
CONFIG_INPUT_SPARSEKMAP=y
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
CONFIG_INPUT_MOUSEDEV_PSAUX=y
|
||||
|
|
@ -280,7 +276,6 @@ CONFIG_SENSORS_LM75=m
|
|||
CONFIG_SENSORS_LM93=m
|
||||
CONFIG_SENSORS_W83627HF=m
|
||||
CONFIG_MEDIA_SUPPORT=m
|
||||
CONFIG_MEDIA_CAMERA_SUPPORT=y
|
||||
CONFIG_MEDIA_USB_SUPPORT=y
|
||||
CONFIG_USB_VIDEO_CLASS=m
|
||||
CONFIG_DRM=y
|
||||
|
|
@ -391,18 +386,13 @@ CONFIG_SECURITY_SELINUX=y
|
|||
CONFIG_SECURITY_SELINUX_BOOTPARAM=y
|
||||
CONFIG_SECURITY_SELINUX_DISABLE=y
|
||||
CONFIG_DEFAULT_SECURITY_DAC=y
|
||||
CONFIG_CRYPTO_AUTHENC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAST5=m
|
||||
CONFIG_CRYPTO_CAST6=m
|
||||
CONFIG_CRYPTO_KHAZAD=m
|
||||
CONFIG_CRYPTO_SERPENT=m
|
||||
CONFIG_CRYPTO_TEA=m
|
||||
CONFIG_CRYPTO_TWOFISH=m
|
||||
CONFIG_CRYPTO_DEFLATE=m
|
||||
CONFIG_PRINTK_TIME=y
|
||||
|
|
|
|||
|
|
@ -64,6 +64,8 @@
|
|||
((MIPS_ISA_REV >= (ge)) && (MIPS_ISA_REV < (lt)))
|
||||
#define __isa_range_or_flag(ge, lt, flag) \
|
||||
(__isa_range(ge, lt) || ((MIPS_ISA_REV < (lt)) && __isa(flag)))
|
||||
#define __isa_range_and_ase(ge, lt, ase) \
|
||||
(__isa_range(ge, lt) && __ase(ase))
|
||||
|
||||
/*
|
||||
* SMP assumption: Options of CPU 0 are a superset of all processors.
|
||||
|
|
@ -421,7 +423,7 @@
|
|||
#endif
|
||||
|
||||
#ifndef cpu_has_mipsmt
|
||||
#define cpu_has_mipsmt __isa_lt_and_ase(6, MIPS_ASE_MIPSMT)
|
||||
#define cpu_has_mipsmt __isa_range_and_ase(2, 6, MIPS_ASE_MIPSMT)
|
||||
#endif
|
||||
|
||||
#ifndef cpu_has_vp
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ extern pte_t *pkmap_page_table;
|
|||
* easily, subsequent pte tables have to be allocated in one physical
|
||||
* chunk of RAM.
|
||||
*/
|
||||
#ifdef CONFIG_PHYS_ADDR_T_64BIT
|
||||
#if defined(CONFIG_PHYS_ADDR_T_64BIT) || defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
|
||||
#define LAST_PKMAP 512
|
||||
#else
|
||||
#define LAST_PKMAP 1024
|
||||
|
|
|
|||
|
|
@ -46,7 +46,13 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
|
|||
static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
|
||||
unsigned long addr, pte_t *ptep)
|
||||
{
|
||||
flush_tlb_page(vma, addr & huge_page_mask(hstate_vma(vma)));
|
||||
/*
|
||||
* clear the huge pte entry firstly, so that the other smp threads will
|
||||
* not get old pte entry after finishing flush_tlb_page and before
|
||||
* setting new huge pte entry
|
||||
*/
|
||||
huge_ptep_get_and_clear(vma->vm_mm, addr, ptep);
|
||||
flush_tlb_page(vma, addr);
|
||||
}
|
||||
|
||||
#define __HAVE_ARCH_HUGE_PTE_NONE
|
||||
|
|
|
|||
|
|
@ -2077,7 +2077,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c)
|
|||
({ int __res; \
|
||||
__asm__ __volatile__( \
|
||||
".set\tpush\n\t" \
|
||||
".set\tmips32r2\n\t" \
|
||||
".set\tmips32r5\n\t" \
|
||||
_ASM_SET_VIRT \
|
||||
"mfgc0\t%0, " #source ", %1\n\t" \
|
||||
".set\tpop" \
|
||||
|
|
@ -2090,7 +2090,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c)
|
|||
({ unsigned long long __res; \
|
||||
__asm__ __volatile__( \
|
||||
".set\tpush\n\t" \
|
||||
".set\tmips64r2\n\t" \
|
||||
".set\tmips64r5\n\t" \
|
||||
_ASM_SET_VIRT \
|
||||
"dmfgc0\t%0, " #source ", %1\n\t" \
|
||||
".set\tpop" \
|
||||
|
|
@ -2103,7 +2103,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c)
|
|||
do { \
|
||||
__asm__ __volatile__( \
|
||||
".set\tpush\n\t" \
|
||||
".set\tmips32r2\n\t" \
|
||||
".set\tmips32r5\n\t" \
|
||||
_ASM_SET_VIRT \
|
||||
"mtgc0\t%z0, " #register ", %1\n\t" \
|
||||
".set\tpop" \
|
||||
|
|
@ -2115,7 +2115,7 @@ do { \
|
|||
do { \
|
||||
__asm__ __volatile__( \
|
||||
".set\tpush\n\t" \
|
||||
".set\tmips64r2\n\t" \
|
||||
".set\tmips64r5\n\t" \
|
||||
_ASM_SET_VIRT \
|
||||
"dmtgc0\t%z0, " #register ", %1\n\t" \
|
||||
".set\tpop" \
|
||||
|
|
|
|||
|
|
@ -59,11 +59,15 @@ do { \
|
|||
|
||||
static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
|
||||
{
|
||||
pmd_t *pmd;
|
||||
pmd_t *pmd = NULL;
|
||||
struct page *pg;
|
||||
|
||||
pmd = (pmd_t *) __get_free_pages(GFP_KERNEL, PMD_ORDER);
|
||||
if (pmd)
|
||||
pg = alloc_pages(GFP_KERNEL | __GFP_ACCOUNT, PMD_ORDER);
|
||||
if (pg) {
|
||||
pgtable_pmd_page_ctor(pg);
|
||||
pmd = (pmd_t *)page_address(pg);
|
||||
pmd_init((unsigned long)pmd, (unsigned long)invalid_pte_table);
|
||||
}
|
||||
return pmd;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -17,6 +17,10 @@
|
|||
#include <asm/unistd_nr_n64.h>
|
||||
#include <asm/unistd_nr_o32.h>
|
||||
|
||||
#define __NR_N32_Linux 6000
|
||||
#define __NR_64_Linux 5000
|
||||
#define __NR_O32_Linux 4000
|
||||
|
||||
#ifdef CONFIG_MIPS32_N32
|
||||
#define NR_syscalls (__NR_N32_Linux + __NR_N32_Linux_syscalls)
|
||||
#elif defined(CONFIG_64BIT)
|
||||
|
|
|
|||
|
|
@ -4,9 +4,11 @@ config MACH_INGENIC_GENERIC
|
|||
bool
|
||||
select MACH_INGENIC
|
||||
select MACH_JZ4740
|
||||
select MACH_JZ4725B
|
||||
select MACH_JZ4770
|
||||
select MACH_JZ4780
|
||||
select MACH_X1000
|
||||
select MACH_X1830
|
||||
|
||||
choice
|
||||
prompt "Machine type"
|
||||
|
|
|
|||
|
|
@ -1840,6 +1840,11 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu)
|
|||
*/
|
||||
case PRID_COMP_INGENIC_D0:
|
||||
c->isa_level &= ~MIPS_CPU_ISA_M32R2;
|
||||
|
||||
/* FPU is not properly detected on JZ4760(B). */
|
||||
if (c->processor_id == 0x2ed0024f)
|
||||
c->options |= MIPS_CPU_FPU;
|
||||
|
||||
fallthrough;
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -5,9 +5,6 @@ uapi := arch/$(SRCARCH)/include/generated/uapi/asm
|
|||
_dummy := $(shell [ -d '$(uapi)' ] || mkdir -p '$(uapi)') \
|
||||
$(shell [ -d '$(kapi)' ] || mkdir -p '$(kapi)')
|
||||
|
||||
syscalln32 := $(src)/syscall_n32.tbl
|
||||
syscalln64 := $(src)/syscall_n64.tbl
|
||||
syscallo32 := $(src)/syscall_o32.tbl
|
||||
syshdr := $(srctree)/scripts/syscallhdr.sh
|
||||
sysnr := $(srctree)/$(src)/syscallnr.sh
|
||||
systbl := $(srctree)/scripts/syscalltbl.sh
|
||||
|
|
@ -18,43 +15,22 @@ quiet_cmd_syshdr = SYSHDR $@
|
|||
quiet_cmd_sysnr = SYSNR $@
|
||||
cmd_sysnr = $(CONFIG_SHELL) '$(sysnr)' '$<' '$@' \
|
||||
'$(sysnr_abis_$(basetarget))' \
|
||||
'$(sysnr_pfx_$(basetarget))' \
|
||||
'$(sysnr_offset_$(basetarget))'
|
||||
'$(sysnr_pfx_$(basetarget))'
|
||||
|
||||
quiet_cmd_systbl = SYSTBL $@
|
||||
cmd_systbl = $(CONFIG_SHELL) $(systbl) $< $@
|
||||
|
||||
$(uapi)/unistd_n32.h: $(syscalln32) $(syshdr) FORCE
|
||||
$(call if_changed,syshdr)
|
||||
|
||||
$(uapi)/unistd_n64.h: $(syscalln64) $(syshdr) FORCE
|
||||
$(call if_changed,syshdr)
|
||||
|
||||
$(uapi)/unistd_o32.h: $(syscallo32) $(syshdr) FORCE
|
||||
$(uapi)/unistd_%.h: $(src)/syscall_%.tbl $(syshdr) FORCE
|
||||
$(call if_changed,syshdr)
|
||||
|
||||
sysnr_pfx_unistd_nr_n32 := N32
|
||||
sysnr_offset_unistd_nr_n32 := 6000
|
||||
$(kapi)/unistd_nr_n32.h: $(syscalln32) $(sysnr) FORCE
|
||||
$(call if_changed,sysnr)
|
||||
|
||||
sysnr_pfx_unistd_nr_n64 := 64
|
||||
sysnr_offset_unistd_nr_n64 := 5000
|
||||
$(kapi)/unistd_nr_n64.h: $(syscalln64) $(sysnr) FORCE
|
||||
$(call if_changed,sysnr)
|
||||
|
||||
sysnr_pfx_unistd_nr_o32 := O32
|
||||
sysnr_offset_unistd_nr_o32 := 4000
|
||||
$(kapi)/unistd_nr_o32.h: $(syscallo32) $(sysnr) FORCE
|
||||
|
||||
$(kapi)/unistd_nr_%.h: $(src)/syscall_%.tbl $(sysnr) FORCE
|
||||
$(call if_changed,sysnr)
|
||||
|
||||
$(kapi)/syscall_table_n32.h: $(syscalln32) $(systbl) FORCE
|
||||
$(call if_changed,systbl)
|
||||
|
||||
$(kapi)/syscall_table_n64.h: $(syscalln64) $(systbl) FORCE
|
||||
$(call if_changed,systbl)
|
||||
|
||||
$(kapi)/syscall_table_o32.h: $(syscallo32) $(systbl) FORCE
|
||||
$(kapi)/syscall_table_%.h: $(src)/syscall_%.tbl $(systbl) FORCE
|
||||
$(call if_changed,systbl)
|
||||
|
||||
uapisyshdr-y += unistd_n32.h \
|
||||
|
|
|
|||
|
|
@ -5,7 +5,6 @@ in="$1"
|
|||
out="$2"
|
||||
my_abis=`echo "($3)" | tr ',' '|'`
|
||||
prefix="$4"
|
||||
offset="$5"
|
||||
|
||||
fileguard=_UAPI_ASM_MIPS_`basename "$out" | sed \
|
||||
-e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \
|
||||
|
|
@ -20,7 +19,6 @@ grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
|
|||
nxt=$((nr+1))
|
||||
done
|
||||
|
||||
printf "#define __NR_%s_Linux\t%s\n" "${prefix}" "${offset}"
|
||||
printf "#define __NR_%s_Linux_syscalls\t%s\n" "${prefix}" "${nxt}"
|
||||
printf "\n"
|
||||
printf "#endif /* %s */" "${fileguard}"
|
||||
|
|
|
|||
|
|
@ -58,8 +58,7 @@ static int _kvm_mips_host_tlb_inv(unsigned long entryhi)
|
|||
tlb_probe_hazard();
|
||||
idx = read_c0_index();
|
||||
|
||||
if (idx >= current_cpu_data.tlbsize)
|
||||
BUG();
|
||||
BUG_ON(idx >= current_cpu_data.tlbsize);
|
||||
|
||||
if (idx >= 0) {
|
||||
write_c0_entryhi(UNIQUE_ENTRYHI(idx));
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@ void __init prom_lefi_init_env(void)
|
|||
struct efi_cpuinfo_loongson *ecpu;
|
||||
struct irq_source_routing_table *eirq_source;
|
||||
u32 id;
|
||||
u16 vendor, device;
|
||||
u16 vendor;
|
||||
|
||||
/* firmware arguments are initialized in head.S */
|
||||
boot_p = (struct boot_params *)fw_arg2;
|
||||
|
|
@ -166,7 +166,6 @@ void __init prom_lefi_init_env(void)
|
|||
/* Read the ID of PCI host bridge to detect bridge type */
|
||||
id = readl(HOST_BRIDGE_CONFIG_ADDR);
|
||||
vendor = id & 0xffff;
|
||||
device = (id >> 16) & 0xffff;
|
||||
|
||||
switch (vendor) {
|
||||
case PCI_VENDOR_ID_LOONGSON:
|
||||
|
|
|
|||
|
|
@ -129,6 +129,9 @@ static void __init node_mem_init(unsigned int node)
|
|||
if (node_end_pfn(0) >= (0xffffffff >> PAGE_SHIFT))
|
||||
memblock_reserve((node_addrspace_offset | 0xfe000000),
|
||||
32 << 20);
|
||||
|
||||
/* Reserve pfn range 0~node[0]->node_start_pfn */
|
||||
memblock_reserve(0, PAGE_SIZE * start_pfn);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -126,11 +126,12 @@ static void loongson_kexec_shutdown(void)
|
|||
for_each_possible_cpu(cpu)
|
||||
if (!cpu_online(cpu))
|
||||
cpu_device_up(get_cpu_device(cpu));
|
||||
|
||||
secondary_kexec_args[0] = TO_UNCAC(0x3ff01000);
|
||||
#endif
|
||||
kexec_args[0] = kexec_argc;
|
||||
kexec_args[1] = fw_arg1;
|
||||
kexec_args[2] = fw_arg2;
|
||||
secondary_kexec_args[0] = TO_UNCAC(0x3ff01000);
|
||||
memcpy((void *)fw_arg1, kexec_argv, KEXEC_ARGV_SIZE);
|
||||
memcpy((void *)fw_arg2, kexec_envp, KEXEC_ENVP_SIZE);
|
||||
}
|
||||
|
|
@ -141,7 +142,9 @@ static void loongson_crash_shutdown(struct pt_regs *regs)
|
|||
kexec_args[0] = kdump_argc;
|
||||
kexec_args[1] = fw_arg1;
|
||||
kexec_args[2] = fw_arg2;
|
||||
#ifdef CONFIG_SMP
|
||||
secondary_kexec_args[0] = TO_UNCAC(0x3ff01000);
|
||||
#endif
|
||||
memcpy((void *)fw_arg1, kdump_argv, KEXEC_ARGV_SIZE);
|
||||
memcpy((void *)fw_arg2, kexec_envp, KEXEC_ENVP_SIZE);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -51,11 +51,11 @@ static uint32_t core0_c0count[NR_CPUS];
|
|||
__wbflush(); \
|
||||
} while (0)
|
||||
|
||||
u32 (*ipi_read_clear)(int cpu);
|
||||
void (*ipi_write_action)(int cpu, u32 action);
|
||||
void (*ipi_write_enable)(int cpu);
|
||||
void (*ipi_clear_buf)(int cpu);
|
||||
void (*ipi_write_buf)(int cpu, struct task_struct *idle);
|
||||
static u32 (*ipi_read_clear)(int cpu);
|
||||
static void (*ipi_write_action)(int cpu, u32 action);
|
||||
static void (*ipi_write_enable)(int cpu);
|
||||
static void (*ipi_clear_buf)(int cpu);
|
||||
static void (*ipi_write_buf)(int cpu, struct task_struct *idle);
|
||||
|
||||
/* send mail via Mail_Send register for 3A4000+ CPU */
|
||||
static void csr_mail_send(uint64_t data, int cpu, int mailbox)
|
||||
|
|
|
|||
|
|
@ -32,6 +32,7 @@ static inline bool cpu_needs_post_dma_flush(void)
|
|||
case CPU_R12000:
|
||||
case CPU_BMIPS5000:
|
||||
case CPU_LOONGSON2EF:
|
||||
case CPU_XBURST:
|
||||
return true;
|
||||
default:
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in a new issue