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clk: meson: eeclk: add init regs

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Like the PLL and MPLL, the controller may require some magic setting to
be applied on startup.

This is needed when the initial setting is not applied by the boot ROM.
The controller need to do it when the setting applies to several clock,
like all the MPLLs in the case of g12a.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
This commit is contained in:
Jerome Brunet 2019-05-13 14:31:14 +02:00
parent 76d3fc38a0
commit 19a18d42bf
2 changed files with 5 additions and 0 deletions
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3
drivers/clk/meson/meson-eeclk.c
View file

@ -34,6 +34,9 @@ int meson_eeclkc_probe(struct platform_device *pdev)
return PTR_ERR(map);
}
if (data->init_count)
regmap_multi_reg_write(map, data->init_regs, data->init_count);
input = meson_clk_hw_register_input(dev, "xtal", IN_PREFIX "xtal", 0);
if (IS_ERR(input)) {
ret = PTR_ERR(input);

2
drivers/clk/meson/meson-eeclk.h
View file

@ -17,6 +17,8 @@ struct platform_device;
struct meson_eeclkc_data {
struct clk_regmap *const *regmap_clks;
unsigned int regmap_clk_num;
const struct reg_sequence *init_regs;
unsigned int init_count;
struct clk_hw_onecell_data *hw_onecell_data;
};