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https://github.com/torvalds/linux
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aspeed devicetree for 4.7
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This commit is contained in:
Arnd Bergmann
commit
18aab73fba
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@ -30,6 +30,7 @@ arm ARM Ltd.
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armadeus ARMadeus Systems SARL
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artesyn Artesyn Embedded Technologies Inc.
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asahi-kasei Asahi Kasei Corp.
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aspeed ASPEED Technology Inc.
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atlas Atlas Scientific LLC
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atmel Atmel Corporation
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auo AU Optronics Corporation
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@ -253,6 +254,7 @@ tplink TP-LINK Technologies Co., Ltd.
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tronfy Tronfy
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tronsmart Tronsmart
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truly Truly Semiconductors Limited
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tyan Tyan Computer Corporation
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upisemi uPI Semiconductor Corp.
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urt United Radiant Technology Corporation
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usi Universal Scientific Industrial Co., Ltd.
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@ -888,6 +888,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
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mt8127-moose.dtb \
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mt8135-evbp1.dtb
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dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
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dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp-palmetto.dtb \
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aspeed-ast2500-evb.dtb
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endif
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dtstree := $(srctree)/$(src)
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25
arch/arm/boot/dts/aspeed-ast2500-evb.dts
Normal file
25
arch/arm/boot/dts/aspeed-ast2500-evb.dts
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@ -0,0 +1,25 @@
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/dts-v1/;
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#include "aspeed-g5.dtsi"
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/ {
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model = "AST2500 EVB";
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compatible = "aspeed,ast2500";
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aliases {
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serial4 = &uart5;
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};
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chosen {
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stdout-path = &uart5;
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bootargs = "console=ttyS4,115200 earlyprintk";
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};
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memory {
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reg = <0x80000000 0x20000000>;
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};
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};
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&uart5 {
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status = "okay";
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};
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25
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
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25
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
Normal file
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@ -0,0 +1,25 @@
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/dts-v1/;
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#include "aspeed-g4.dtsi"
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/ {
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model = "Palmetto BMC";
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compatible = "tyan,palmetto-bmc", "aspeed,ast2400";
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aliases {
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serial4 = &uart5;
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};
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chosen {
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stdout-path = &uart5;
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bootargs = "console=ttyS4,38400 earlyprintk";
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};
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memory {
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reg = <0x40000000 0x10000000>;
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};
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};
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&uart5 {
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status = "okay";
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};
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161
arch/arm/boot/dts/aspeed-g4.dtsi
Normal file
161
arch/arm/boot/dts/aspeed-g4.dtsi
Normal file
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@ -0,0 +1,161 @@
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#include "skeleton.dtsi"
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/ {
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model = "Aspeed BMC";
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compatible = "aspeed,ast2400";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&vic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,arm926ej-s";
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device_type = "cpu";
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reg = <0>;
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};
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};
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clocks {
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clk_clkin: clk_clkin {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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};
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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vic: interrupt-controller@1e6c0080 {
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compatible = "aspeed,ast2400-vic";
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interrupt-controller;
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#interrupt-cells = <1>;
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valid-sources = <0xffffffff 0x0007ffff>;
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reg = <0x1e6c0080 0x80>;
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};
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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clk_hpll: clk_hpll@1e6e2070 {
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#clock-cells = <0>;
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compatible = "aspeed,g4-hpll-clock";
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reg = <0x1e6e2070 0x4>;
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clocks = <&clk_clkin>;
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};
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clk_apb: clk_apb@1e6e2008 {
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#clock-cells = <0>;
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compatible = "aspeed,g4-apb-clock";
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reg = <0x1e6e2008 0x4>;
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clocks = <&clk_hpll>;
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};
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clk_uart: clk_uart@1e6e2008 {
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#clock-cells = <0>;
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compatible = "aspeed,uart-clock";
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reg = <0x1e6e202c 0x4>;
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};
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sram@1e720000 {
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compatible = "mmio-sram";
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reg = <0x1e720000 0x8000>; // 32K
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};
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timer: timer@1e782000 {
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compatible = "aspeed,ast2400-timer";
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reg = <0x1e782000 0x90>;
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// The moxart_timer driver registers only one
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// interrupt and assumes it's for timer 1
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//interrupts = <16 17 18 35 36 37 38 39>;
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interrupts = <16>;
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clocks = <&clk_apb>;
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};
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wdt1: wdt@1e785000 {
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compatible = "aspeed,wdt";
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reg = <0x1e785000 0x1c>;
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interrupts = <27>;
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};
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wdt2: wdt@1e785020 {
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compatible = "aspeed,wdt";
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reg = <0x1e785020 0x1c>;
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interrupts = <27>;
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clocks = <&clk_apb>;
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status = "disabled";
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};
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uart1: serial@1e783000 {
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compatible = "ns16550a";
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reg = <0x1e783000 0x1000>;
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reg-shift = <2>;
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interrupts = <9>;
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clocks = <&clk_uart>;
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no-loopback-test;
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status = "disabled";
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};
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uart2: serial@1e78d000 {
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compatible = "ns16550a";
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reg = <0x1e78d000 0x1000>;
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reg-shift = <2>;
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interrupts = <32>;
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clocks = <&clk_uart>;
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no-loopback-test;
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status = "disabled";
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};
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uart3: serial@1e78e000 {
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compatible = "ns16550a";
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reg = <0x1e78e000 0x1000>;
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reg-shift = <2>;
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interrupts = <33>;
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clocks = <&clk_uart>;
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no-loopback-test;
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status = "disabled";
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};
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uart4: serial@1e78f000 {
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compatible = "ns16550a";
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reg = <0x1e78f000 0x1000>;
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reg-shift = <2>;
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interrupts = <34>;
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clocks = <&clk_uart>;
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no-loopback-test;
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status = "disabled";
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};
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uart5: serial@1e784000 {
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compatible = "ns16550a";
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reg = <0x1e784000 0x1000>;
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reg-shift = <2>;
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interrupts = <10>;
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clocks = <&clk_uart>;
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current-speed = <38400>;
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no-loopback-test;
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status = "disabled";
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};
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uart6: serial@1e787000 {
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compatible = "ns16550a";
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reg = <0x1e787000 0x1000>;
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reg-shift = <2>;
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interrupts = <10>;
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clocks = <&clk_uart>;
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no-loopback-test;
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status = "disabled";
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};
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};
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};
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};
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170
arch/arm/boot/dts/aspeed-g5.dtsi
Normal file
170
arch/arm/boot/dts/aspeed-g5.dtsi
Normal file
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@ -0,0 +1,170 @@
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#include "skeleton.dtsi"
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/ {
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model = "Aspeed BMC";
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compatible = "aspeed,ast2500";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&vic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,arm1176jzf-s";
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device_type = "cpu";
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reg = <0>;
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};
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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vic: interrupt-controller@1e6c0080 {
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compatible = "aspeed,ast2400-vic";
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interrupt-controller;
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#interrupt-cells = <1>;
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valid-sources = <0xfefff7ff 0x0807ffff>;
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reg = <0x1e6c0080 0x80>;
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};
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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clk_clkin: clk_clkin@1e6e2070 {
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#clock-cells = <0>;
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compatible = "aspeed,g5-clkin-clock";
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reg = <0x1e6e2070 0x04>;
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};
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clk_hpll: clk_hpll@1e6e2024 {
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#clock-cells = <0>;
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compatible = "aspeed,g5-hpll-clock";
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reg = <0x1e6e2024 0x4>;
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clocks = <&clk_clkin>;
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};
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clk_ahb: clk_ahb@1e6e2070 {
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#clock-cells = <0>;
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compatible = "aspeed,g5-ahb-clock";
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reg = <0x1e6e2070 0x4>;
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clocks = <&clk_hpll>;
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};
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clk_apb: clk_apb@1e6e2008 {
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#clock-cells = <0>;
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compatible = "aspeed,g5-apb-clock";
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reg = <0x1e6e2008 0x4>;
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clocks = <&clk_hpll>;
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};
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clk_uart: clk_uart@1e6e2008 {
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#clock-cells = <0>;
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compatible = "aspeed,uart-clock";
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reg = <0x1e6e202c 0x4>;
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};
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sram@1e720000 {
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compatible = "mmio-sram";
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reg = <0x1e720000 0x9000>; // 36K
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};
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timer: timer@1e782000 {
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compatible = "aspeed,ast2400-timer";
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reg = <0x1e782000 0x90>;
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// The moxart_timer driver registers only one
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// interrupt and assumes it's for timer 1
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//interrupts = <16 17 18 35 36 37 38 39>;
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interrupts = <16>;
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clocks = <&clk_apb>;
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};
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wdt1: wdt@1e785000 {
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compatible = "aspeed,wdt";
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reg = <0x1e785000 0x1c>;
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interrupts = <27>;
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};
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wdt2: wdt@1e785020 {
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compatible = "aspeed,wdt";
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reg = <0x1e785020 0x1c>;
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interrupts = <27>;
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status = "disabled";
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};
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wdt3: wdt@1e785040 {
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compatible = "aspeed,wdt";
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reg = <0x1e785074 0x1c>;
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status = "disabled";
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};
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uart1: serial@1e783000 {
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compatible = "ns16550a";
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reg = <0x1e783000 0x1000>;
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reg-shift = <2>;
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interrupts = <9>;
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clocks = <&clk_uart>;
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no-loopback-test;
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status = "disabled";
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};
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uart2: serial@1e78d000 {
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compatible = "ns16550a";
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reg = <0x1e78d000 0x1000>;
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reg-shift = <2>;
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interrupts = <32>;
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clocks = <&clk_uart>;
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no-loopback-test;
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status = "disabled";
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};
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uart3: serial@1e78e000 {
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compatible = "ns16550a";
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reg = <0x1e78e000 0x1000>;
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reg-shift = <2>;
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interrupts = <33>;
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clocks = <&clk_uart>;
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no-loopback-test;
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status = "disabled";
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};
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uart4: serial@1e78f000 {
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compatible = "ns16550a";
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reg = <0x1e78f000 0x1000>;
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reg-shift = <2>;
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interrupts = <34>;
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clocks = <&clk_uart>;
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no-loopback-test;
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status = "disabled";
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};
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uart5: serial@1e784000 {
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compatible = "ns16550a";
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reg = <0x1e784000 0x1000>;
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reg-shift = <2>;
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interrupts = <10>;
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clocks = <&clk_uart>;
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current-speed = <38400>;
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no-loopback-test;
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status = "disabled";
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};
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uart6: serial@1e787000 {
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compatible = "ns16550a";
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reg = <0x1e787000 0x1000>;
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reg-shift = <2>;
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interrupts = <10>;
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clocks = <&clk_uart>;
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no-loopback-test;
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status = "disabled";
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};
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};
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};
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};
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