ASoC: Intel: Skylake: Reset DSP pipe in skl_pcm_hw_free

Currently during destroy pipeline the gateway is disabled
before DMA completion. This leads to improper draining of
data and subsequently causing issues on HD-Audio DMA.
Hence added a new pipe reset IPC in skl_pcm_hw_free in
which the Gateway Enable(GEN bit) is reset to 0 after
DMA completion in skl_pcm_trigger.

Signed-off-by: Divya Prakash <divya1.prakash@intel.com>
Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Divya Prakash 2018-04-02 12:15:49 +05:30 committed by Mark Brown
parent b999a19b33
commit 179c2e8632
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GPG key ID: 24D68B725D5487D0

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@ -366,9 +366,21 @@ static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
{
struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
struct skl *skl = get_skl_ctx(dai->dev);
struct skl_module_cfg *mconfig;
int ret;
dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
if (mconfig) {
ret = skl_reset_pipe(skl->skl_sst, mconfig->pipe);
if (ret < 0)
dev_err(dai->dev, "%s:Reset failed ret =%d",
__func__, ret);
}
snd_hdac_stream_cleanup(hdac_stream(stream));
hdac_stream(stream)->prepared = 0;