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[MIPS] Kconfig: Provide sane NR_CPUS defaults for more configurations

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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2007-02-06 16:53:15 +00:00
parent 24d55728dc
commit 130e2fb783
1 changed files with 32 additions and 3 deletions
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35
arch/mips/Kconfig
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@ -575,6 +575,7 @@ config SGI_IP27
select DMA_IP27 select DMA_IP27
select EARLY_PRINTK select EARLY_PRINTK
select HW_HAS_PCI select HW_HAS_PCI
select NR_CPUS_DEFAULT_64
select PCI_DOMAINS select PCI_DOMAINS
select SYS_HAS_CPU_R10000 select SYS_HAS_CPU_R10000
select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL
@ -612,6 +613,7 @@ config SIBYTE_BIGSUR
bool "Sibyte BCM91480B-BigSur" bool "Sibyte BCM91480B-BigSur"
select BOOT_ELF32 select BOOT_ELF32
select DMA_COHERENT select DMA_COHERENT
select NR_CPUS_DEFAULT_4
select PCI_DOMAINS select PCI_DOMAINS
select SIBYTE_BCM1x80 select SIBYTE_BCM1x80
select SWAP_IO_SPACE select SWAP_IO_SPACE
@ -623,6 +625,7 @@ config SIBYTE_SWARM
bool "Sibyte BCM91250A-SWARM" bool "Sibyte BCM91250A-SWARM"
select BOOT_ELF32 select BOOT_ELF32
select DMA_COHERENT select DMA_COHERENT
select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250 select SIBYTE_SB1250
select SWAP_IO_SPACE select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1 select SYS_HAS_CPU_SB1
@ -635,6 +638,7 @@ config SIBYTE_SENTOSA
depends on EXPERIMENTAL depends on EXPERIMENTAL
select BOOT_ELF32 select BOOT_ELF32
select DMA_COHERENT select DMA_COHERENT
select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250 select SIBYTE_SB1250
select SWAP_IO_SPACE select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1 select SYS_HAS_CPU_SB1
@ -668,6 +672,7 @@ config SIBYTE_PTSWARM
depends on EXPERIMENTAL depends on EXPERIMENTAL
select BOOT_ELF32 select BOOT_ELF32
select DMA_COHERENT select DMA_COHERENT
select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250 select SIBYTE_SB1250
select SWAP_IO_SPACE select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1 select SYS_HAS_CPU_SB1
@ -680,6 +685,7 @@ config SIBYTE_LITTLESUR
depends on EXPERIMENTAL depends on EXPERIMENTAL
select BOOT_ELF32 select BOOT_ELF32
select DMA_COHERENT select DMA_COHERENT
select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250 select SIBYTE_SB1250
select SWAP_IO_SPACE select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1 select SYS_HAS_CPU_SB1
@ -1524,6 +1530,8 @@ config MIPS_MT_SMTC
select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_SRS select CPU_MIPSR2_SRS
select MIPS_MT select MIPS_MT
select NR_CPUS_DEFAULT_2
select NR_CPUS_DEFAULT_8
select SMP select SMP
select SYS_SUPPORTS_SMP select SYS_SUPPORTS_SMP
help help
@ -1739,13 +1747,34 @@ config SMP
config SYS_SUPPORTS_SMP config SYS_SUPPORTS_SMP
bool bool
config NR_CPUS_DEFAULT_2
bool
config NR_CPUS_DEFAULT_4
bool
config NR_CPUS_DEFAULT_8
bool
config NR_CPUS_DEFAULT_16
bool
config NR_CPUS_DEFAULT_32
bool
config NR_CPUS_DEFAULT_64
bool
config NR_CPUS config NR_CPUS
int "Maximum number of CPUs (2-64)" int "Maximum number of CPUs (2-64)"
range 2 64 range 2 64
depends on SMP depends on SMP
default "64" if SGI_IP27 default "2" if NR_CPUS_DEFAULT_2
default "2" default "4" if NR_CPUS_DEFAULT_4
default "8" if MIPS_MT_SMTC default "8" if NR_CPUS_DEFAULT_8
default "16" if NR_CPUS_DEFAULT_16
default "32" if NR_CPUS_DEFAULT_32
default "64" if NR_CPUS_DEFAULT_64
help help
This allows you to specify the maximum number of CPUs which this This allows you to specify the maximum number of CPUs which this
kernel will support. The maximum supported value is 32 for 32-bit kernel will support. The maximum supported value is 32 for 32-bit