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powerpc fixes for 4.14 #4
Nine small fixes, really nothing that stands out. A work around for a spurious MCE on Power9. A CXL fault handling fix, some fixes to the new XIVE code, and a fix to the new 32-bit STRICT_KERNEL_RWX code. Fixes for old code/stable: an fix to an incorrect TLB flush on boot but not on any current machines, a compile error on 4xx and a fix to memory hotplug when using radix (Power9). Thanks to: Anton Blanchard, Cédric Le Goater, Christian Lamparter, Christophe Leroy, Christophe Lombard, Guenter Roeck, Jeremy Kerr, Michael Neuling, Nicholas Piggin. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZ11/yAAoJEFHr6jzI4aWAooYQAKjOKamLyxRotFGSqBfrfOMN UfWKAmfeoF/gi4z03x8JdhcMQ1CMh5c/cQmrwzkzDosQ2m83CEWzNbk0gFV0Tpld 2qDTrEnBfTC4TRhCwWuOlaQC8LFeqxwpsCS6iXGpYoTY2NzmsbliPIQaruCIqj3f F+7etfTqGJ+gCCkGfT0s7m96QO+daaT32nXL1VM8i/rOOpwZ23oj6kR3/ZSTWxBc eyzvUcTLLhLp8hJoF0kU4f1VQtYijnpqK6ULr3wSfxYqjB9S4dsGyiF537aw5bKX UPUCoMgkttVy8Jh35dtvKLuMqlfjHGqoe6UcezSG9a6wxeUnQRzsVmXihNDSkyEt EawmPS6R5YaXXu9NKsleKBZDAdU4+EkcX24Wwn/lZy3wTKc1Lys+wH9hXuzzGNiH JYEcMacXvpM1yFYNT+ouyLtoT86VWVCdwihueBMV74lyV87Wr55zS65XP6Z+Bb8/ aPL906sOAvnJW1JhHbYq/UxLfvs0enHNHpyR0xM4/oXi+RoGfhbM/MC1uJxv4w9z 12n1hbrpaRxHSSnJr1gahCrDoNUXLjkO2+0Ur3iXP4tfMMhwDs8qCILeaKpNmzkC sO1ehOmXSSYqJLNiPmSIxs/QEzjFrvQdNwZOIav+3Tsc5ofR6wsauDCmfK5br2Mg BdhW7LXtqL77cmOzN95e =etbe -----END PGP SIGNATURE----- Merge tag 'powerpc-4.14-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: "Nine small fixes, really nothing that stands out. A work-around for a spurious MCE on Power9. A CXL fault handling fix, some fixes to the new XIVE code, and a fix to the new 32-bit STRICT_KERNEL_RWX code. Fixes for old code/stable: an fix to an incorrect TLB flush on boot but not on any current machines, a compile error on 4xx and a fix to memory hotplug when using radix (Power9). Thanks to: Anton Blanchard, Cédric Le Goater, Christian Lamparter, Christophe Leroy, Christophe Lombard, Guenter Roeck, Jeremy Kerr, Michael Neuling, Nicholas Piggin" * tag 'powerpc-4.14-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/powernv: Increase memory block size to 1GB on radix powerpc/mm: Call flush_tlb_kernel_range with interrupts enabled powerpc/xive: Clear XIVE internal structures when a CPU is removed powerpc/xive: Fix IPI reset powerpc/4xx: Fix compile error with 64K pages on 40x, 44x powerpc: Fix action argument for cpufeatures-based TLB flush cxl: Fix memory page not handled powerpc: Fix workaround for spurious MCE on POWER9 powerpc: Handle MCE on POWER9 with only DSISR bit 30 set
This commit is contained in:
commit
1249b571ba
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@ -102,10 +102,10 @@ static void cpufeatures_flush_tlb(void)
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case PVR_POWER8:
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case PVR_POWER8E:
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case PVR_POWER8NVL:
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__flush_tlb_power8(POWER8_TLB_SETS);
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__flush_tlb_power8(TLB_INVAL_SCOPE_GLOBAL);
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break;
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case PVR_POWER9:
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__flush_tlb_power9(POWER9_TLB_SETS_HASH);
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__flush_tlb_power9(TLB_INVAL_SCOPE_GLOBAL);
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break;
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default:
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pr_err("unknown CPU version for boot TLB flush\n");
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@ -624,5 +624,18 @@ long __machine_check_early_realmode_p8(struct pt_regs *regs)
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long __machine_check_early_realmode_p9(struct pt_regs *regs)
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{
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/*
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* On POWER9 DD2.1 and below, it's possible to get a machine check
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* caused by a paste instruction where only DSISR bit 25 is set. This
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* will result in the MCE handler seeing an unknown event and the kernel
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* crashing. An MCE that occurs like this is spurious, so we don't need
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* to do anything in terms of servicing it. If there is something that
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* needs to be serviced, the CPU will raise the MCE again with the
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* correct DSISR so that it can be serviced properly. So detect this
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* case and mark it as handled.
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*/
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if (SRR1_MC_LOADSTORE(regs->msr) && regs->dsisr == 0x02000000)
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return 1;
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return mce_handle_error(regs, mce_p9_derror_table, mce_p9_ierror_table);
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}
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@ -904,9 +904,6 @@ void __init setup_arch(char **cmdline_p)
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#endif
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#endif
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#ifdef CONFIG_PPC_64K_PAGES
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init_mm.context.pte_frag = NULL;
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#endif
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#ifdef CONFIG_SPAPR_TCE_IOMMU
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mm_iommu_init(&init_mm);
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#endif
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@ -361,9 +361,9 @@ static int change_page_attr(struct page *page, int numpages, pgprot_t prot)
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break;
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}
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wmb();
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local_irq_restore(flags);
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flush_tlb_kernel_range((unsigned long)page_address(start),
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(unsigned long)page_address(page));
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local_irq_restore(flags);
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return err;
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}
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@ -272,7 +272,15 @@ static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
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#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
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static unsigned long pnv_memory_block_size(void)
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{
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return 256UL * 1024 * 1024;
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/*
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* We map the kernel linear region with 1GB large pages on radix. For
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* memory hot unplug to work our memory block size must be at least
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* this size.
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*/
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if (radix_enabled())
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return 1UL * 1024 * 1024 * 1024;
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else
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return 256UL * 1024 * 1024;
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}
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#endif
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@ -1402,6 +1402,14 @@ void xive_teardown_cpu(void)
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if (xive_ops->teardown_cpu)
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xive_ops->teardown_cpu(cpu, xc);
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#ifdef CONFIG_SMP
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/* Get rid of IPI */
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xive_cleanup_cpu_ipi(cpu, xc);
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#endif
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/* Disable and free the queues */
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xive_cleanup_cpu_queues(cpu, xc);
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}
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void xive_kexec_teardown_cpu(int secondary)
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@ -431,7 +431,11 @@ static int xive_spapr_get_ipi(unsigned int cpu, struct xive_cpu *xc)
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static void xive_spapr_put_ipi(unsigned int cpu, struct xive_cpu *xc)
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{
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if (!xc->hw_ipi)
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return;
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xive_irq_bitmap_free(xc->hw_ipi);
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xc->hw_ipi = 0;
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}
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#endif /* CONFIG_SMP */
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@ -219,8 +219,17 @@ int cxllib_handle_fault(struct mm_struct *mm, u64 addr, u64 size, u64 flags)
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down_read(&mm->mmap_sem);
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for (dar = addr; dar < addr + size; dar += page_size) {
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if (!vma || dar < vma->vm_start || dar > vma->vm_end) {
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vma = find_vma(mm, addr);
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if (!vma) {
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pr_err("Can't find vma for addr %016llx\n", addr);
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rc = -EFAULT;
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goto out;
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}
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/* get the size of the pages allocated */
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page_size = vma_kernel_pagesize(vma);
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for (dar = (addr & ~(page_size - 1)); dar < (addr + size); dar += page_size) {
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if (dar < vma->vm_start || dar >= vma->vm_end) {
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vma = find_vma(mm, addr);
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if (!vma) {
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pr_err("Can't find vma for addr %016llx\n", addr);
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