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https://github.com/torvalds/linux
synced 2024-11-05 18:23:50 +00:00
Merge branch 'amd-xgbe'
Tom Lendacky says: ==================== amd-xgbe: AMD XGBE driver update 2014-08-05 The following series of patches includes fixes/updates to the driver. - Use dma_set_mask_and_coherent to set the DMA mask - Move the phy connect/disconnect logic to allow for module unloading Changes in V2: - Check the return value of the dma_set_mask_and_coherent call ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
0ca58d6242
3 changed files with 126 additions and 101 deletions
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@ -122,6 +122,7 @@
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#include <linux/clk.h>
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#include <linux/if_ether.h>
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#include <linux/net_tstamp.h>
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#include <linux/phy.h>
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#include "xgbe.h"
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#include "xgbe-common.h"
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@ -521,6 +522,114 @@ static void xgbe_free_rx_skbuff(struct xgbe_prv_data *pdata)
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DBGPR("<--xgbe_free_rx_skbuff\n");
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}
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static void xgbe_adjust_link(struct net_device *netdev)
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{
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struct xgbe_prv_data *pdata = netdev_priv(netdev);
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struct xgbe_hw_if *hw_if = &pdata->hw_if;
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struct phy_device *phydev = pdata->phydev;
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int new_state = 0;
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if (phydev == NULL)
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return;
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if (phydev->link) {
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/* Flow control support */
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if (pdata->pause_autoneg) {
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if (phydev->pause || phydev->asym_pause) {
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pdata->tx_pause = 1;
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pdata->rx_pause = 1;
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} else {
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pdata->tx_pause = 0;
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pdata->rx_pause = 0;
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}
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}
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if (pdata->tx_pause != pdata->phy_tx_pause) {
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hw_if->config_tx_flow_control(pdata);
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pdata->phy_tx_pause = pdata->tx_pause;
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}
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if (pdata->rx_pause != pdata->phy_rx_pause) {
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hw_if->config_rx_flow_control(pdata);
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pdata->phy_rx_pause = pdata->rx_pause;
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}
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/* Speed support */
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if (phydev->speed != pdata->phy_speed) {
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new_state = 1;
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switch (phydev->speed) {
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case SPEED_10000:
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hw_if->set_xgmii_speed(pdata);
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break;
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case SPEED_2500:
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hw_if->set_gmii_2500_speed(pdata);
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break;
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case SPEED_1000:
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hw_if->set_gmii_speed(pdata);
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break;
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}
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pdata->phy_speed = phydev->speed;
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}
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if (phydev->link != pdata->phy_link) {
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new_state = 1;
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pdata->phy_link = 1;
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}
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} else if (pdata->phy_link) {
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new_state = 1;
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pdata->phy_link = 0;
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pdata->phy_speed = SPEED_UNKNOWN;
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}
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if (new_state)
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phy_print_status(phydev);
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}
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static int xgbe_phy_init(struct xgbe_prv_data *pdata)
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{
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struct net_device *netdev = pdata->netdev;
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struct phy_device *phydev = pdata->phydev;
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int ret;
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pdata->phy_link = -1;
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pdata->phy_speed = SPEED_UNKNOWN;
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pdata->phy_tx_pause = pdata->tx_pause;
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pdata->phy_rx_pause = pdata->rx_pause;
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ret = phy_connect_direct(netdev, phydev, &xgbe_adjust_link,
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pdata->phy_mode);
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if (ret) {
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netdev_err(netdev, "phy_connect_direct failed\n");
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return ret;
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}
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if (!phydev->drv || (phydev->drv->phy_id == 0)) {
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netdev_err(netdev, "phy_id not valid\n");
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ret = -ENODEV;
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goto err_phy_connect;
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}
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DBGPR(" phy_connect_direct succeeded for PHY %s, link=%d\n",
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dev_name(&phydev->dev), phydev->link);
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return 0;
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err_phy_connect:
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phy_disconnect(phydev);
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return ret;
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}
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static void xgbe_phy_exit(struct xgbe_prv_data *pdata)
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{
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if (!pdata->phydev)
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return;
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phy_disconnect(pdata->phydev);
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}
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int xgbe_powerdown(struct net_device *netdev, unsigned int caller)
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{
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struct xgbe_prv_data *pdata = netdev_priv(netdev);
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@ -986,11 +1095,16 @@ static int xgbe_open(struct net_device *netdev)
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DBGPR("-->xgbe_open\n");
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/* Initialize the phy */
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ret = xgbe_phy_init(pdata);
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if (ret)
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return ret;
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/* Enable the clocks */
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ret = clk_prepare_enable(pdata->sysclk);
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if (ret) {
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netdev_alert(netdev, "dma clk_prepare_enable failed\n");
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return ret;
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goto err_phy_init;
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}
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ret = clk_prepare_enable(pdata->ptpclk);
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@ -1047,6 +1161,9 @@ static int xgbe_open(struct net_device *netdev)
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err_sysclk:
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clk_disable_unprepare(pdata->sysclk);
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err_phy_init:
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xgbe_phy_exit(pdata);
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return ret;
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}
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@ -1077,6 +1194,9 @@ static int xgbe_close(struct net_device *netdev)
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clk_disable_unprepare(pdata->ptpclk);
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clk_disable_unprepare(pdata->sysclk);
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/* Release the phy */
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xgbe_phy_exit(pdata);
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DBGPR("<--xgbe_close\n");
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return 0;
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@ -303,8 +303,11 @@ static int xgbe_probe(struct platform_device *pdev)
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/* Set the DMA mask */
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if (!dev->dma_mask)
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dev->dma_mask = &dev->coherent_dma_mask;
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*(dev->dma_mask) = DMA_BIT_MASK(40);
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dev->coherent_dma_mask = DMA_BIT_MASK(40);
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ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
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if (ret) {
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dev_err(dev, "dma_set_mask_and_coherent failed\n");
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goto err_io;
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}
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if (of_property_read_bool(dev->of_node, "dma-coherent")) {
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pdata->axdomain = XGBE_DMA_OS_AXDOMAIN;
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@ -116,7 +116,6 @@
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#include <linux/module.h>
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#include <linux/kmod.h>
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#include <linux/spinlock.h>
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#include <linux/mdio.h>
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#include <linux/phy.h>
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#include <linux/of.h>
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@ -158,77 +157,6 @@ static int xgbe_mdio_write(struct mii_bus *mii, int prtad, int mmd_reg,
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return 0;
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}
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static void xgbe_adjust_link(struct net_device *netdev)
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{
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struct xgbe_prv_data *pdata = netdev_priv(netdev);
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struct xgbe_hw_if *hw_if = &pdata->hw_if;
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struct phy_device *phydev = pdata->phydev;
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int new_state = 0;
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if (phydev == NULL)
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return;
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DBGPR_MDIO("-->xgbe_adjust_link: address=%d, newlink=%d, curlink=%d\n",
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phydev->addr, phydev->link, pdata->phy_link);
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if (phydev->link) {
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/* Flow control support */
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if (pdata->pause_autoneg) {
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if (phydev->pause || phydev->asym_pause) {
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pdata->tx_pause = 1;
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pdata->rx_pause = 1;
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} else {
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pdata->tx_pause = 0;
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pdata->rx_pause = 0;
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}
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}
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if (pdata->tx_pause != pdata->phy_tx_pause) {
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hw_if->config_tx_flow_control(pdata);
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pdata->phy_tx_pause = pdata->tx_pause;
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}
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if (pdata->rx_pause != pdata->phy_rx_pause) {
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hw_if->config_rx_flow_control(pdata);
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pdata->phy_rx_pause = pdata->rx_pause;
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}
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/* Speed support */
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if (phydev->speed != pdata->phy_speed) {
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new_state = 1;
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switch (phydev->speed) {
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case SPEED_10000:
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hw_if->set_xgmii_speed(pdata);
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break;
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case SPEED_2500:
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hw_if->set_gmii_2500_speed(pdata);
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break;
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case SPEED_1000:
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hw_if->set_gmii_speed(pdata);
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break;
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}
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pdata->phy_speed = phydev->speed;
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}
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if (phydev->link != pdata->phy_link) {
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new_state = 1;
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pdata->phy_link = 1;
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}
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} else if (pdata->phy_link) {
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new_state = 1;
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pdata->phy_link = 0;
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pdata->phy_speed = SPEED_UNKNOWN;
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}
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if (new_state)
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phy_print_status(phydev);
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DBGPR_MDIO("<--xgbe_adjust_link\n");
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}
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void xgbe_dump_phy_registers(struct xgbe_prv_data *pdata)
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{
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struct device *dev = pdata->dev;
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@ -278,7 +206,6 @@ void xgbe_dump_phy_registers(struct xgbe_prv_data *pdata)
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int xgbe_mdio_register(struct xgbe_prv_data *pdata)
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{
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struct net_device *netdev = pdata->netdev;
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struct device_node *phy_node;
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struct mii_bus *mii;
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struct phy_device *phydev;
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@ -293,7 +220,6 @@ int xgbe_mdio_register(struct xgbe_prv_data *pdata)
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return -EINVAL;
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}
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/* Register with the MDIO bus */
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mii = mdiobus_alloc();
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if (mii == NULL) {
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dev_err(pdata->dev, "mdiobus_alloc failed\n");
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@ -348,26 +274,6 @@ int xgbe_mdio_register(struct xgbe_prv_data *pdata)
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pdata->mii = mii;
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pdata->mdio_mmd = MDIO_MMD_PCS;
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pdata->phy_link = -1;
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pdata->phy_speed = SPEED_UNKNOWN;
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pdata->phy_tx_pause = pdata->tx_pause;
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pdata->phy_rx_pause = pdata->rx_pause;
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ret = phy_connect_direct(netdev, phydev, &xgbe_adjust_link,
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pdata->phy_mode);
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if (ret) {
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netdev_err(netdev, "phy_connect_direct failed\n");
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goto err_phy_device;
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}
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if (!phydev->drv || (phydev->drv->phy_id == 0)) {
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netdev_err(netdev, "phy_id not valid\n");
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ret = -ENODEV;
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goto err_phy_connect;
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}
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DBGPR(" phy_connect_direct succeeded for PHY %s, link=%d\n",
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dev_name(&phydev->dev), phydev->link);
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phydev->autoneg = pdata->default_autoneg;
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if (phydev->autoneg == AUTONEG_DISABLE) {
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phydev->speed = pdata->default_speed;
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@ -386,9 +292,6 @@ int xgbe_mdio_register(struct xgbe_prv_data *pdata)
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return 0;
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err_phy_connect:
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phy_disconnect(phydev);
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err_phy_device:
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phy_device_free(phydev);
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@ -408,7 +311,6 @@ void xgbe_mdio_unregister(struct xgbe_prv_data *pdata)
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{
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DBGPR("-->xgbe_mdio_unregister\n");
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phy_disconnect(pdata->phydev);
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pdata->phydev = NULL;
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module_put(pdata->phy_module);
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