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dmaengine: idxd: Fix incorrect descriptions for GRPCFG register

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Fix incorrect descriptions for the GRPCFG register which has three
sub-registers (GRPWQCFG, GRPENGCFG and GRPFLGCFG).
No functional changes

Signed-off-by: Guanjun <guanjun@linux.alibaba.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Fenghua Yu <fenghua.yu@intel.com>
Acked-by: Lijun Pan <lijun.pan@intel.com>
Link: https://lore.kernel.org/r/20231211053704.2725417-3-guanjun@linux.alibaba.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Guanjun 2023-12-11 13:37:04 +08:00 committed by Vinod Koul
parent 778dfacc90
commit 0c154698a0
1 changed files with 7 additions and 5 deletions
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12
drivers/dma/idxd/registers.h
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@ -440,12 +440,14 @@ union wqcfg {
/* /*
* This macro calculates the offset into the GRPCFG register * This macro calculates the offset into the GRPCFG register
* idxd - struct idxd * * idxd - struct idxd *
* n - wq id * n - group id
* ofs - the index of the 32b dword for the config register * ofs - the index of the 64b qword for the config register
* *
* The WQCFG register block is divided into groups per each wq. The n index * The GRPCFG register block is divided into three sub-registers, which
* allows us to move to the register group that's for that particular wq. * are GRPWQCFG, GRPENGCFG and GRPFLGCFG. The n index allows us to move
* Each register is 32bits. The ofs gives us the number of register to access. * to the register block that contains the three sub-registers.
* Each register block is 64bits. And the ofs gives us the offset
* within the GRPWQCFG register to access.
*/ */
#define GRPWQCFG_OFFSET(idxd_dev, n, ofs) ((idxd_dev)->grpcfg_offset +\ #define GRPWQCFG_OFFSET(idxd_dev, n, ofs) ((idxd_dev)->grpcfg_offset +\
(n) * GRPCFG_SIZE + sizeof(u64) * (ofs)) (n) * GRPCFG_SIZE + sizeof(u64) * (ofs))