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arm64 fixes:
- Fix EFI stub cache maintenance causing aborts during boot on certain platforms - Handle byte stores in __clear_user without panicking - Fix race condition in aarch64_insn_patch_text_sync() (instruction patching) - Couple of type fixes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUZkvBAAoJEGvWsS0AyF7xfSMP/1GRyhDmyLCzVosgaN+aArow zP/UQWTLhr+zE0efF8acBEB57kNAO9abUvyi5XA70ZJcSBFYXCxTp73mZbw7ZVhc jhZxTHX9OFsfWvnDDlAXg+pV9W1RJ9CbvhumWeORR7M03g8B16HD3N7jfgxpbb83 TjyhEtsWuxEVOxzNFetbV+UWwejWmgpnvMrw+WLwBj0Gchj/uEYnjSDN8HCsZpOb 9VWuJcWZEmjlsJu8IhSbbyklRrV1fRSH+Bc5TcXFQ62kHrqJuGQ6FyM9tN31DRZx xtEH0FmWtkCSQ9SMYk1U8smta8noHEtlrlXCO2t1IDb+SmjepZ3rtQkKhibgJlOG cstQ/oCoh9O8mMyA4mFZMaA85naIueB2gTy46UnftUh3IPOEqw9upMU0iBfvlwNf umqa+RkMKoJLz7ZrieV9NHRK/7/VA6q6IVPUgyQqmSQZRQoZLZEgI084/4cw53Ir sRzylCdp6qXe0m0YIovWcckxEBO/+gm+i1cDSMaNeUzN7TFvusk5FeFFHSgms5Oq kQZhBFQFu9xikQSwoNulKdvDVb4mX12Zs45RMiRmH0pGriy/EjLRdyYlc/UKXEix VbS4SHLnt+8DyVVrpeLhbd+TIazKjIOnh53JTiYgyDLm2TQNJv0bn1w8ctR0zt4G /wjukJe9Y8ywPhCPk797 =XfeB -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: - fix EFI stub cache maintenance causing aborts during boot on certain platforms - handle byte stores in __clear_user without panicking - fix race condition in aarch64_insn_patch_text_sync() (instruction patching) - Couple of type fixes * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: ARCH_PFN_OFFSET should be unsigned long Correct the race condition in aarch64_insn_patch_text_sync() arm64: __clear_user: handle exceptions on strb arm64: Fix data type for physical address arm64: efi: Fix stub cache maintenance
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commit
0861fd1c25
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@ -142,7 +142,7 @@ static inline void *phys_to_virt(phys_addr_t x)
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* virt_to_page(k) convert a _valid_ virtual address to struct page *
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* virt_addr_valid(k) indicates whether a virtual address is valid
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*/
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#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET
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#define ARCH_PFN_OFFSET ((unsigned long)PHYS_PFN_OFFSET)
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#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
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#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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@ -54,18 +54,17 @@ ENTRY(efi_stub_entry)
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b.eq efi_load_fail
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/*
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* efi_entry() will have relocated the kernel image if necessary
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* and we return here with device tree address in x0 and the kernel
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* entry point stored at *image_addr. Save those values in registers
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* which are callee preserved.
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* efi_entry() will have copied the kernel image if necessary and we
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* return here with device tree address in x0 and the kernel entry
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* point stored at *image_addr. Save those values in registers which
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* are callee preserved.
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*/
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mov x20, x0 // DTB address
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ldr x0, [sp, #16] // relocated _text address
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mov x21, x0
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/*
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* Flush dcache covering current runtime addresses
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* of kernel text/data. Then flush all of icache.
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* Calculate size of the kernel Image (same for original and copy).
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*/
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adrp x1, _text
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add x1, x1, #:lo12:_text
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@ -73,9 +72,24 @@ ENTRY(efi_stub_entry)
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add x2, x2, #:lo12:_edata
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sub x1, x2, x1
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/*
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* Flush the copied Image to the PoC, and ensure it is not shadowed by
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* stale icache entries from before relocation.
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*/
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bl __flush_dcache_area
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ic ialluis
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/*
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* Ensure that the rest of this function (in the original Image) is
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* visible when the caches are disabled. The I-cache can't have stale
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* entries for the VA range of the current image, so no maintenance is
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* necessary.
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*/
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adr x0, efi_stub_entry
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adr x1, efi_stub_entry_end
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sub x1, x1, x0
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bl __flush_dcache_area
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/* Turn off Dcache and MMU */
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mrs x0, CurrentEL
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cmp x0, #CurrentEL_EL2
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@ -105,4 +119,5 @@ efi_load_fail:
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ldp x29, x30, [sp], #32
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ret
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efi_stub_entry_end:
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ENDPROC(efi_stub_entry)
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@ -163,9 +163,10 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
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* which ends with "dsb; isb" pair guaranteeing global
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* visibility.
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*/
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atomic_set(&pp->cpu_count, -1);
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/* Notify other processors with an additional increment. */
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atomic_inc(&pp->cpu_count);
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} else {
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while (atomic_read(&pp->cpu_count) != -1)
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while (atomic_read(&pp->cpu_count) <= num_online_cpus())
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cpu_relax();
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isb();
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}
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@ -46,7 +46,7 @@ USER(9f, strh wzr, [x0], #2 )
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sub x1, x1, #2
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4: adds x1, x1, #1
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b.mi 5f
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strb wzr, [x0]
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USER(9f, strb wzr, [x0] )
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5: mov x0, #0
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ret
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ENDPROC(__clear_user)
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@ -202,7 +202,7 @@ static void __init alloc_init_pmd(pud_t *pud, unsigned long addr,
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}
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static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,
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unsigned long end, unsigned long phys,
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unsigned long end, phys_addr_t phys,
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int map_io)
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{
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pud_t *pud;
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