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drm/amd/display: block MPO if it prevents pstate support

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This change adds a method to block mpo when it would cause us to
exit pstate support. We should block mpo by default where MPO
causes issues by preventing pstate change.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin 2023-09-11 09:56:45 -04:00 committed by Alex Deucher
parent ce74bece80
commit 072ae240cd
3 changed files with 25 additions and 2 deletions
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17
drivers/gpu/drm/amd/display/dc/core/dc.c
View file

@ -5420,3 +5420,20 @@ void dc_set_edp_power(const struct dc *dc, struct dc_link *edp_link,
edp_link->dc->link_srv->edp_set_panel_power(edp_link, powerOn);
}
/*
*****************************************************************************
* dc_get_power_profile_for_dc_state() - extracts power profile from dc state
*
* Called when DM wants to make power policy decisions based on dc_state
*
*****************************************************************************
*/
struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state *context)
{
struct dc_power_profile profile = { 0 };
profile.power_level += !context->bw_ctx.bw.dcn.clk.p_state_change_support;
return profile;
}

6
drivers/gpu/drm/amd/display/dc/dc.h
View file

@ -2360,6 +2360,12 @@ void dc_print_dmub_diagnostic_data(const struct dc *dc);
void dc_query_current_properties(struct dc *dc, struct dc_current_properties *properties);
struct dc_power_profile {
int power_level; /* Lower is better */
};
struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state *context);
/* DSC Interfaces */
#include "dc_dsc.h"

4
drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
View file

@ -137,8 +137,8 @@
#define DCN3_15_MAX_DET_SIZE 384
#define DCN3_15_CRB_SEGMENT_SIZE_KB 64
#define DCN3_15_MAX_DET_SEGS (DCN3_15_MAX_DET_SIZE / DCN3_15_CRB_SEGMENT_SIZE_KB)
/* Minimum 2 extra segments need to be in compbuf and claimable to guarantee seamless mpo transitions */
#define MIN_RESERVED_DET_SEGS 2
/* Minimum 3 extra segments need to be in compbuf and claimable to guarantee seamless mpo transitions */
#define MIN_RESERVED_DET_SEGS 3
enum dcn31_clk_src_array_id {
DCN31_CLK_SRC_PLL0,