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omap: GPIO module enable/disable

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This patch disables a GPIO module when all pins of a GPIO
module are inactive (clock gating forced at module level) and
enables the module when any gpio in the module is requested.

The module is enabled only when "mod_usage" indicates that no GPIO
in that  module is currently active and the GPIO being requested
is the 1st one to be active in that module.

Each module would be disabled in omap_gpio_free() API when all
GPIOs in a particular module becomes inactive. The module is
re-enabled in omap_gpio_request() API when a GPIO is requested
from the module that was previously disabled.

Since individual GPIO's bookkeeping is added in this patch
via "mod_usage", the same is used in omap_set_gpio_debounce()
& omap_set_gpio_debounce_time() APIs to ensure that the gpio being
used is actually "requested" prior to being used (Nishant Menon's
<nm@ti.comSuggestion)

GPIO module level details are specific to hardware and hence
introducing this patch in low level layer (plat-omap/gpio.c)

Signed-off-by: Charulatha V <charu@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Charulatha V 2009-11-22 10:11:25 -08:00 committed by Tony Lindgren
parent edeae658b2
commit 058af1ea98
1 changed files with 32 additions and 0 deletions
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32
arch/arm/plat-omap/gpio.c
View file

@ -195,6 +195,7 @@ struct gpio_bank {
spinlock_t lock;
struct gpio_chip chip;
struct clk *dbck;
u32 mod_usage;
};
#define METHOD_MPUIO 0
@ -628,6 +629,10 @@ void omap_set_gpio_debounce(int gpio, int enable)
#else
reg += OMAP24XX_GPIO_DEBOUNCE_EN;
#endif
if (!(bank->mod_usage & l)) {
printk(KERN_ERR "GPIO %d not requested\n", gpio);
return;
}
spin_lock_irqsave(&bank->lock, flags);
val = __raw_readl(reg);
@ -663,6 +668,11 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
bank = get_gpio_bank(gpio);
reg = bank->base;
if (!bank->mod_usage) {
printk(KERN_ERR "GPIO not requested\n");
return;
}
enc_time &= 0xff;
#ifdef CONFIG_ARCH_OMAP4
reg += OMAP4_GPIO_DEBOUNCINGTIME;
@ -1144,6 +1154,16 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
__raw_writel(__raw_readl(reg) | (1 << offset), reg);
}
#endif
if (!cpu_class_is_omap1()) {
if (!bank->mod_usage) {
u32 ctrl;
ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
ctrl &= 0xFFFFFFFE;
/* Module is enabled, clocks are not gated */
__raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL);
}
bank->mod_usage |= 1 << offset;
}
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
@ -1170,6 +1190,16 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
__raw_writel(1 << offset, reg);
}
#endif
if (!cpu_class_is_omap1()) {
bank->mod_usage &= ~(1 << offset);
if (!bank->mod_usage) {
u32 ctrl;
ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
/* Module is disabled, clocks are gated */
ctrl |= 1;
__raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL);
}
}
_reset_gpio(bank, bank->chip.base + offset);
spin_unlock_irqrestore(&bank->lock, flags);
}
@ -1749,6 +1779,8 @@ static int __init _omap_gpio_init(void)
gpio_count = 32;
}
#endif
bank->mod_usage = 0;
/* REVISIT eventually switch from OMAP-specific gpio structs
* over to the generic ones
*/