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https://github.com/torvalds/linux
synced 2024-09-06 18:01:05 +00:00
perf, arch: Cleanup perf-pmu init vs lockup-detector
The perf hardware pmu got initialized at various points in the boot, some before early_initcall() some after (notably arch_initcall). The problem is that the NMI lockup detector is ran from early_initcall() and expects the hardware pmu to be present. Sanitize this by moving all architecture hardware pmu implementations to initialize at early_initcall() and move the lockup detector to an explicit initcall right after that. Cc: paulus <paulus@samba.org> Cc: davem <davem@davemloft.net> Cc: Michael Cree <mcree@orcon.net.nz> Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <1290707759.2145.119.camel@laptop> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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5ef428c4b5
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004417a6d4
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@ -1,10 +1,4 @@
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#ifndef __ASM_ALPHA_PERF_EVENT_H
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#define __ASM_ALPHA_PERF_EVENT_H
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#ifdef CONFIG_PERF_EVENTS
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extern void init_hw_perf_events(void);
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#else
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static inline void init_hw_perf_events(void) { }
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#endif
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#endif /* __ASM_ALPHA_PERF_EVENT_H */
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@ -112,8 +112,6 @@ init_IRQ(void)
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wrent(entInt, 0);
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alpha_mv.init_irq();
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init_hw_perf_events();
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}
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/*
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@ -14,6 +14,7 @@
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#include <linux/kernel.h>
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#include <linux/kdebug.h>
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#include <linux/mutex.h>
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#include <linux/init.h>
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#include <asm/hwrpb.h>
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#include <asm/atomic.h>
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@ -863,13 +864,13 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr,
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/*
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* Init call to initialise performance events at kernel startup.
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*/
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void __init init_hw_perf_events(void)
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int __init init_hw_perf_events(void)
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{
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pr_info("Performance events: ");
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if (!supported_cpu()) {
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pr_cont("No support for your CPU.\n");
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return;
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return 0;
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}
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pr_cont("Supported CPU type!\n");
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@ -882,5 +883,7 @@ void __init init_hw_perf_events(void)
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alpha_pmu = &ev67_pmu;
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perf_pmu_register(&pmu);
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}
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return 0;
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}
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early_initcall(init_hw_perf_events);
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@ -3038,7 +3038,7 @@ init_hw_perf_events(void)
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return 0;
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}
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arch_initcall(init_hw_perf_events);
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early_initcall(init_hw_perf_events);
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/*
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* Callchain handling code.
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@ -1047,6 +1047,6 @@ init_hw_perf_events(void)
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return 0;
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}
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arch_initcall(init_hw_perf_events);
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early_initcall(init_hw_perf_events);
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#endif /* defined(CONFIG_CPU_MIPS32)... */
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@ -126,4 +126,4 @@ static int init_e500_pmu(void)
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return register_fsl_emb_pmu(&e500_pmu);
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}
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arch_initcall(init_e500_pmu);
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early_initcall(init_e500_pmu);
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@ -414,4 +414,4 @@ static int init_mpc7450_pmu(void)
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return register_power_pmu(&mpc7450_pmu);
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}
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arch_initcall(init_mpc7450_pmu);
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early_initcall(init_mpc7450_pmu);
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@ -613,4 +613,4 @@ static int init_power4_pmu(void)
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return register_power_pmu(&power4_pmu);
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}
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arch_initcall(init_power4_pmu);
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early_initcall(init_power4_pmu);
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@ -682,4 +682,4 @@ static int init_power5p_pmu(void)
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return register_power_pmu(&power5p_pmu);
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}
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arch_initcall(init_power5p_pmu);
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early_initcall(init_power5p_pmu);
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@ -621,4 +621,4 @@ static int init_power5_pmu(void)
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return register_power_pmu(&power5_pmu);
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}
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arch_initcall(init_power5_pmu);
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early_initcall(init_power5_pmu);
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@ -544,4 +544,4 @@ static int init_power6_pmu(void)
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return register_power_pmu(&power6_pmu);
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}
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arch_initcall(init_power6_pmu);
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early_initcall(init_power6_pmu);
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@ -369,4 +369,4 @@ static int init_power7_pmu(void)
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return register_power_pmu(&power7_pmu);
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}
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arch_initcall(init_power7_pmu);
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early_initcall(init_power7_pmu);
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@ -494,4 +494,4 @@ static int init_ppc970_pmu(void)
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return register_power_pmu(&ppc970_pmu);
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}
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arch_initcall(init_ppc970_pmu);
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early_initcall(init_ppc970_pmu);
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@ -250,4 +250,4 @@ static int __init sh7750_pmu_init(void)
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return register_sh_pmu(&sh7750_pmu);
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}
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arch_initcall(sh7750_pmu_init);
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early_initcall(sh7750_pmu_init);
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@ -284,4 +284,4 @@ static int __init sh4a_pmu_init(void)
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return register_sh_pmu(&sh4a_pmu);
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}
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arch_initcall(sh4a_pmu_init);
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early_initcall(sh4a_pmu_init);
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@ -4,8 +4,6 @@
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#ifdef CONFIG_PERF_EVENTS
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#include <asm/ptrace.h>
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extern void init_hw_perf_events(void);
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#define perf_arch_fetch_caller_regs(regs, ip) \
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do { \
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unsigned long _pstate, _asi, _pil, _i7, _fp; \
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(regs)->u_regs[UREG_I6] = _fp; \
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(regs)->u_regs[UREG_I7] = _i7; \
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} while (0)
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#else
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static inline void init_hw_perf_events(void) { }
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#endif
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#endif
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@ -270,8 +270,6 @@ int __init nmi_init(void)
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atomic_set(&nmi_active, -1);
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}
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}
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if (!err)
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init_hw_perf_events();
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return err;
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}
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@ -1307,20 +1307,23 @@ static bool __init supported_pmu(void)
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return false;
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}
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void __init init_hw_perf_events(void)
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int __init init_hw_perf_events(void)
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{
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pr_info("Performance events: ");
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if (!supported_pmu()) {
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pr_cont("No support for PMU type '%s'\n", sparc_pmu_type);
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return;
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return 0;
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}
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pr_cont("Supported PMU type is '%s'\n", sparc_pmu_type);
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perf_pmu_register(&pmu);
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register_die_notifier(&perf_event_nmi_notifier);
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return 0;
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}
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early_initcall(init_hw_perf_event);
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void perf_callchain_kernel(struct perf_callchain_entry *entry,
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struct pt_regs *regs)
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@ -125,7 +125,6 @@ union cpuid10_edx {
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#define IBS_OP_MAX_CNT_EXT 0x007FFFFFULL /* not a register bit mask */
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#ifdef CONFIG_PERF_EVENTS
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extern void init_hw_perf_events(void);
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extern void perf_events_lapic_init(void);
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#define PERF_EVENT_INDEX_OFFSET 0
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}
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#else
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static inline void init_hw_perf_events(void) { }
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static inline void perf_events_lapic_init(void) { }
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#endif
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@ -894,7 +894,6 @@ void __init identify_boot_cpu(void)
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#else
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vgetcpu_set_mode();
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#endif
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init_hw_perf_events();
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}
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void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c)
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@ -1353,7 +1353,7 @@ static void __init pmu_check_apic(void)
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pr_info("no hardware sampling interrupt available.\n");
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}
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void __init init_hw_perf_events(void)
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int __init init_hw_perf_events(void)
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{
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struct event_constraint *c;
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int err;
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err = amd_pmu_init();
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break;
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default:
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return;
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return 0;
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}
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if (err != 0) {
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pr_cont("no PMU driver, software events only.\n");
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return;
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return 0;
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}
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pmu_check_apic();
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/* sanity check that the hardware exists or is emulated */
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if (!check_hw_exists()) {
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pr_cont("Broken PMU hardware detected, software events only.\n");
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return;
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return 0;
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}
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pr_cont("%s PMU driver.\n", x86_pmu.name);
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perf_pmu_register(&pmu);
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perf_cpu_notifier(x86_pmu_notifier);
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return 0;
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}
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early_initcall(init_hw_perf_events);
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static inline void x86_pmu_read(struct perf_event *event)
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{
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@ -316,6 +316,7 @@ extern int proc_dowatchdog_thresh(struct ctl_table *table, int write,
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size_t *lenp, loff_t *ppos);
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extern unsigned int softlockup_panic;
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extern int softlockup_thresh;
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void lockup_detector_init(void);
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#else
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static inline void touch_softlockup_watchdog(void)
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{
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static inline void touch_all_softlockup_watchdogs(void)
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{
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}
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static inline void lockup_detector_init(void)
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{
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}
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#endif
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#ifdef CONFIG_DETECT_HUNG_TASK
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@ -882,6 +882,7 @@ static int __init kernel_init(void * unused)
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smp_prepare_cpus(setup_max_cpus);
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do_pre_smp_initcalls();
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lockup_detector_init();
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smp_init();
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sched_init_smp();
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@ -547,13 +547,13 @@ static struct notifier_block __cpuinitdata cpu_nfb = {
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.notifier_call = cpu_callback
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};
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static int __init spawn_watchdog_task(void)
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void __init lockup_detector_init(void)
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{
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void *cpu = (void *)(long)smp_processor_id();
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int err;
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if (no_watchdog)
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return 0;
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return;
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err = cpu_callback(&cpu_nfb, CPU_UP_PREPARE, cpu);
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WARN_ON(notifier_to_errno(err));
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cpu_callback(&cpu_nfb, CPU_ONLINE, cpu);
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register_cpu_notifier(&cpu_nfb);
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return 0;
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return;
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}
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early_initcall(spawn_watchdog_task);
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