2019-05-19 12:08:55 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2016-09-19 21:04:18 +00:00
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#include <linux/extable.h>
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2016-12-24 19:46:01 +00:00
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#include <linux/uaccess.h>
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2017-02-08 17:51:35 +00:00
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#include <linux/sched/debug.h>
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2021-11-10 10:01:09 +00:00
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#include <linux/bitfield.h>
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2017-11-24 08:42:21 +00:00
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#include <xen/xen.h>
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2017-02-08 17:51:35 +00:00
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2021-10-15 01:16:41 +00:00
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#include <asm/fpu/api.h>
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2021-04-27 11:16:34 +00:00
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#include <asm/sev.h>
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2016-04-02 14:01:33 +00:00
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#include <asm/traps.h>
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2016-07-04 22:31:27 +00:00
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#include <asm/kdebug.h>
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2021-11-10 10:01:09 +00:00
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#include <asm/insn-eval.h>
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2021-11-10 10:01:20 +00:00
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#include <asm/sgx.h>
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2021-11-10 10:01:09 +00:00
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static inline unsigned long *pt_regs_nr(struct pt_regs *regs, int nr)
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{
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int reg_offset = pt_regs_offset(regs, nr);
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static unsigned long __dummy;
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if (WARN_ON_ONCE(reg_offset < 0))
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return &__dummy;
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return (unsigned long *)((unsigned long)regs + reg_offset);
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}
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2008-01-30 12:31:41 +00:00
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2012-04-21 00:12:48 +00:00
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static inline unsigned long
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ex_fixup_addr(const struct exception_table_entry *x)
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{
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return (unsigned long)&x->fixup + x->fixup;
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}
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2008-01-30 12:31:41 +00:00
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2021-11-10 10:01:09 +00:00
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static bool ex_handler_default(const struct exception_table_entry *e,
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2021-09-08 13:29:18 +00:00
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struct pt_regs *regs)
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2008-01-30 12:31:41 +00:00
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{
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2021-11-10 10:01:09 +00:00
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if (e->data & EX_FLAG_CLEAR_AX)
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regs->ax = 0;
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if (e->data & EX_FLAG_CLEAR_DX)
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regs->dx = 0;
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regs->ip = ex_fixup_addr(e);
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2016-02-17 18:20:12 +00:00
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return true;
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}
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2021-09-08 13:29:18 +00:00
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static bool ex_handler_fault(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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2016-02-17 18:20:12 +00:00
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{
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regs->ax = trapnr;
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2021-09-08 13:29:18 +00:00
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return ex_handler_default(fixup, regs);
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2016-02-17 18:20:12 +00:00
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}
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2021-11-10 10:01:20 +00:00
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static bool ex_handler_sgx(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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regs->ax = trapnr | SGX_ENCLS_FAULT_FLAG;
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return ex_handler_default(fixup, regs);
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}
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x86/fpu: Reinitialize FPU registers if restoring FPU state fails
Userspace can change the FPU state of a task using the ptrace() or
rt_sigreturn() system calls. Because reserved bits in the FPU state can
cause the XRSTOR instruction to fail, the kernel has to carefully
validate that no reserved bits or other invalid values are being set.
Unfortunately, there have been bugs in this validation code. For
example, we were not checking that the 'xcomp_bv' field in the
xstate_header was 0. As-is, such bugs are exploitable to read the FPU
registers of other processes on the system. To do so, an attacker can
create a task, assign to it an invalid FPU state, then spin in a loop
and monitor the values of the FPU registers. Because the task's FPU
registers are not being restored, sometimes the FPU registers will have
the values from another process.
This is likely to continue to be a problem in the future because the
validation done by the CPU instructions like XRSTOR is not immediately
visible to kernel developers. Nor will invalid FPU states ever be
encountered during ordinary use --- they will only be seen during
fuzzing or exploits. There can even be reserved bits outside the
xstate_header which are easy to forget about. For example, the MXCSR
register contains reserved bits, which were not validated by the
KVM_SET_XSAVE ioctl until commit a575813bfe4b ("KVM: x86: Fix load
damaged SSEx MXCSR register").
Therefore, mitigate this class of vulnerability by restoring the FPU
registers from init_fpstate if restoring from the task's state fails.
We actually used to do this, but it was (perhaps unwisely) removed by
commit 9ccc27a5d297 ("x86/fpu: Remove error return values from
copy_kernel_to_*regs() functions"). This new patch is also a bit
different. First, it only clears the registers, not also the bad
in-memory state; this is simpler and makes it easier to make the
mitigation cover all callers of __copy_kernel_to_fpregs(). Second, it
does the register clearing in an exception handler so that no extra
instructions are added to context switches. In fact, we *remove*
instructions, since previously we were always zeroing the register
containing 'err' even if CONFIG_X86_DEBUG_FPU was disabled.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Reviewed-by: Rik van Riel <riel@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Eric Biggers <ebiggers3@gmail.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Kevin Hao <haokexin@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Michael Halcrow <mhalcrow@google.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Wanpeng Li <wanpeng.li@hotmail.com>
Cc: Yu-cheng Yu <yu-cheng.yu@intel.com>
Cc: kernel-hardening@lists.openwall.com
Link: http://lkml.kernel.org/r/20170922174156.16780-4-ebiggers3@gmail.com
Link: http://lkml.kernel.org/r/20170923130016.21448-27-mingo@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-09-23 13:00:09 +00:00
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/*
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* Handler for when we fail to restore a task's FPU state. We should never get
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* here because the FPU state of a task using the FPU (task->thread.fpu.state)
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* should always be valid. However, past bugs have allowed userspace to set
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* reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn().
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* These caused XRSTOR to fail when switching to the task, leaking the FPU
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* registers of the task previously executing on the CPU. Mitigate this class
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* of vulnerability by restoring from the initial state (essentially, zeroing
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* out all the FPU registers) if we can't restore from the task's FPU state.
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*/
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2021-09-08 13:29:18 +00:00
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static bool ex_handler_fprestore(const struct exception_table_entry *fixup,
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struct pt_regs *regs)
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x86/fpu: Reinitialize FPU registers if restoring FPU state fails
Userspace can change the FPU state of a task using the ptrace() or
rt_sigreturn() system calls. Because reserved bits in the FPU state can
cause the XRSTOR instruction to fail, the kernel has to carefully
validate that no reserved bits or other invalid values are being set.
Unfortunately, there have been bugs in this validation code. For
example, we were not checking that the 'xcomp_bv' field in the
xstate_header was 0. As-is, such bugs are exploitable to read the FPU
registers of other processes on the system. To do so, an attacker can
create a task, assign to it an invalid FPU state, then spin in a loop
and monitor the values of the FPU registers. Because the task's FPU
registers are not being restored, sometimes the FPU registers will have
the values from another process.
This is likely to continue to be a problem in the future because the
validation done by the CPU instructions like XRSTOR is not immediately
visible to kernel developers. Nor will invalid FPU states ever be
encountered during ordinary use --- they will only be seen during
fuzzing or exploits. There can even be reserved bits outside the
xstate_header which are easy to forget about. For example, the MXCSR
register contains reserved bits, which were not validated by the
KVM_SET_XSAVE ioctl until commit a575813bfe4b ("KVM: x86: Fix load
damaged SSEx MXCSR register").
Therefore, mitigate this class of vulnerability by restoring the FPU
registers from init_fpstate if restoring from the task's state fails.
We actually used to do this, but it was (perhaps unwisely) removed by
commit 9ccc27a5d297 ("x86/fpu: Remove error return values from
copy_kernel_to_*regs() functions"). This new patch is also a bit
different. First, it only clears the registers, not also the bad
in-memory state; this is simpler and makes it easier to make the
mitigation cover all callers of __copy_kernel_to_fpregs(). Second, it
does the register clearing in an exception handler so that no extra
instructions are added to context switches. In fact, we *remove*
instructions, since previously we were always zeroing the register
containing 'err' even if CONFIG_X86_DEBUG_FPU was disabled.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Reviewed-by: Rik van Riel <riel@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Eric Biggers <ebiggers3@gmail.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Kevin Hao <haokexin@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Michael Halcrow <mhalcrow@google.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Wanpeng Li <wanpeng.li@hotmail.com>
Cc: Yu-cheng Yu <yu-cheng.yu@intel.com>
Cc: kernel-hardening@lists.openwall.com
Link: http://lkml.kernel.org/r/20170922174156.16780-4-ebiggers3@gmail.com
Link: http://lkml.kernel.org/r/20170923130016.21448-27-mingo@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-09-23 13:00:09 +00:00
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{
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regs->ip = ex_fixup_addr(fixup);
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WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.",
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(void *)instruction_pointer(regs));
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2021-10-15 01:16:41 +00:00
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fpu_reset_from_exception_fixup();
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x86/fpu: Reinitialize FPU registers if restoring FPU state fails
Userspace can change the FPU state of a task using the ptrace() or
rt_sigreturn() system calls. Because reserved bits in the FPU state can
cause the XRSTOR instruction to fail, the kernel has to carefully
validate that no reserved bits or other invalid values are being set.
Unfortunately, there have been bugs in this validation code. For
example, we were not checking that the 'xcomp_bv' field in the
xstate_header was 0. As-is, such bugs are exploitable to read the FPU
registers of other processes on the system. To do so, an attacker can
create a task, assign to it an invalid FPU state, then spin in a loop
and monitor the values of the FPU registers. Because the task's FPU
registers are not being restored, sometimes the FPU registers will have
the values from another process.
This is likely to continue to be a problem in the future because the
validation done by the CPU instructions like XRSTOR is not immediately
visible to kernel developers. Nor will invalid FPU states ever be
encountered during ordinary use --- they will only be seen during
fuzzing or exploits. There can even be reserved bits outside the
xstate_header which are easy to forget about. For example, the MXCSR
register contains reserved bits, which were not validated by the
KVM_SET_XSAVE ioctl until commit a575813bfe4b ("KVM: x86: Fix load
damaged SSEx MXCSR register").
Therefore, mitigate this class of vulnerability by restoring the FPU
registers from init_fpstate if restoring from the task's state fails.
We actually used to do this, but it was (perhaps unwisely) removed by
commit 9ccc27a5d297 ("x86/fpu: Remove error return values from
copy_kernel_to_*regs() functions"). This new patch is also a bit
different. First, it only clears the registers, not also the bad
in-memory state; this is simpler and makes it easier to make the
mitigation cover all callers of __copy_kernel_to_fpregs(). Second, it
does the register clearing in an exception handler so that no extra
instructions are added to context switches. In fact, we *remove*
instructions, since previously we were always zeroing the register
containing 'err' even if CONFIG_X86_DEBUG_FPU was disabled.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Reviewed-by: Rik van Riel <riel@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Eric Biggers <ebiggers3@gmail.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Kevin Hao <haokexin@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Michael Halcrow <mhalcrow@google.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Wanpeng Li <wanpeng.li@hotmail.com>
Cc: Yu-cheng Yu <yu-cheng.yu@intel.com>
Cc: kernel-hardening@lists.openwall.com
Link: http://lkml.kernel.org/r/20170922174156.16780-4-ebiggers3@gmail.com
Link: http://lkml.kernel.org/r/20170923130016.21448-27-mingo@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-09-23 13:00:09 +00:00
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return true;
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}
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2021-09-08 13:29:18 +00:00
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static bool ex_handler_uaccess(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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2018-08-28 20:14:18 +00:00
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{
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x86-64: add warning for non-canonical user access address dereferences
This adds a warning (once) for any kernel dereference that has a user
exception handler, but accesses a non-canonical address. It basically
is a simpler - and more limited - version of commit 9da3f2b74054
("x86/fault: BUG() when uaccess helpers fault on kernel addresses") that
got reverted.
Note that unlike that original commit, this only causes a warning,
because there are real situations where we currently can do this
(notably speculative argument fetching for uprobes etc). Also, unlike
that original commit, this _only_ triggers for #GP accesses, so the
cases of valid kernel pointers that cross into a non-mapped page aren't
affected.
The intent of this is two-fold:
- the uprobe/tracing accesses really do need to be more careful. In
particular, from a portability standpoint it's just wrong to think
that "a pointer is a pointer", and use the same logic for any random
pointer value you find on the stack. It may _work_ on x86-64, but it
doesn't necessarily work on other architectures (where the same
pointer value can be either a kernel pointer _or_ a user pointer, and
you really need to be much more careful in how you try to access it)
The warning can hopefully end up being a reminder that just any
random pointer access won't do.
- Kees in particular wanted a way to actually report invalid uses of
wild pointers to user space accessors, instead of just silently
failing them. Automated fuzzers want a way to get reports if the
kernel ever uses invalid values that the fuzzer fed it.
The non-canonical address range is a fair chunk of the address space,
and with this you can teach syzkaller to feed in invalid pointer
values and find cases where we do not properly validate user
addresses (possibly due to bad uses of "set_fs()").
Acked-by: Kees Cook <keescook@chromium.org>
Cc: Jann Horn <jannh@google.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2019-02-26 17:16:04 +00:00
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WARN_ONCE(trapnr == X86_TRAP_GP, "General protection fault in user access. Non-canonical address?");
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2021-09-08 13:29:18 +00:00
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return ex_handler_default(fixup, regs);
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2018-08-28 20:14:18 +00:00
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}
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2021-09-08 13:29:18 +00:00
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static bool ex_handler_copy(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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2020-10-06 21:09:07 +00:00
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{
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WARN_ONCE(trapnr == X86_TRAP_GP, "General protection fault in user access. Non-canonical address?");
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2021-09-08 13:29:18 +00:00
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return ex_handler_fault(fixup, regs, trapnr);
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2020-10-06 21:09:07 +00:00
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}
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2021-11-10 10:01:10 +00:00
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static bool ex_handler_msr(const struct exception_table_entry *fixup,
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struct pt_regs *regs, bool wrmsr, bool safe, int reg)
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2016-04-02 14:01:37 +00:00
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{
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2021-11-10 10:01:10 +00:00
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if (!safe && wrmsr &&
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pr_warn_once("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pS)\n",
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(unsigned int)regs->cx, (unsigned int)regs->dx,
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(unsigned int)regs->ax, regs->ip, (void *)regs->ip))
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show_stack_regs(regs);
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if (!safe && !wrmsr &&
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pr_warn_once("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pS)\n",
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2016-07-04 22:31:27 +00:00
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(unsigned int)regs->cx, regs->ip, (void *)regs->ip))
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show_stack_regs(regs);
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2016-04-02 14:01:37 +00:00
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2021-11-10 10:01:10 +00:00
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if (!wrmsr) {
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/* Pretend that the read succeeded and returned 0. */
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regs->ax = 0;
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regs->dx = 0;
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}
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2016-04-02 14:01:37 +00:00
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2021-11-10 10:01:10 +00:00
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if (safe)
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*pt_regs_nr(regs, reg) = -EIO;
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2016-04-02 14:01:37 +00:00
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2021-09-08 13:29:18 +00:00
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return ex_handler_default(fixup, regs);
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2016-04-02 14:01:37 +00:00
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}
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2021-09-08 13:29:18 +00:00
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static bool ex_handler_clear_fs(const struct exception_table_entry *fixup,
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struct pt_regs *regs)
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2016-04-26 19:23:26 +00:00
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{
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if (static_cpu_has(X86_BUG_NULL_SEG))
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asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS));
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asm volatile ("mov %0, %%fs" : : "rm" (0));
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2021-09-08 13:29:18 +00:00
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return ex_handler_default(fixup, regs);
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2016-04-26 19:23:26 +00:00
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}
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2021-11-10 10:01:09 +00:00
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static bool ex_handler_imm_reg(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int reg, int imm)
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{
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*pt_regs_nr(regs, reg) = (long)imm;
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return ex_handler_default(fixup, regs);
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}
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2021-11-10 10:01:22 +00:00
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static bool ex_handler_ucopy_len(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr, int reg, int imm)
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{
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|
|
regs->cx = imm * regs->cx + *pt_regs_nr(regs, reg);
|
|
|
|
|
return ex_handler_uaccess(fixup, regs, trapnr);
|
|
|
|
|
}
|
|
|
|
|
|
2021-09-08 13:29:18 +00:00
|
|
|
int ex_get_fixup_type(unsigned long ip)
|
2016-02-17 18:20:12 +00:00
|
|
|
{
|
2021-09-08 13:29:18 +00:00
|
|
|
const struct exception_table_entry *e = search_exception_tables(ip);
|
2016-02-17 18:20:12 +00:00
|
|
|
|
2021-11-10 10:01:09 +00:00
|
|
|
return e ? FIELD_GET(EX_DATA_TYPE_MASK, e->data) : EX_TYPE_NONE;
|
2016-02-17 18:20:12 +00:00
|
|
|
}
|
|
|
|
|
|
2018-08-28 20:14:19 +00:00
|
|
|
int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code,
|
|
|
|
|
unsigned long fault_addr)
|
2016-02-17 18:20:12 +00:00
|
|
|
{
|
|
|
|
|
const struct exception_table_entry *e;
|
2021-11-10 10:01:09 +00:00
|
|
|
int type, reg, imm;
|
2008-01-30 12:31:41 +00:00
|
|
|
|
|
|
|
|
#ifdef CONFIG_PNPBIOS
|
|
|
|
|
if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) {
|
|
|
|
|
extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp;
|
|
|
|
|
extern u32 pnp_bios_is_utter_crap;
|
|
|
|
|
pnp_bios_is_utter_crap = 1;
|
|
|
|
|
printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n");
|
|
|
|
|
__asm__ volatile(
|
|
|
|
|
"movl %0, %%esp\n\t"
|
|
|
|
|
"jmp *%1\n\t"
|
|
|
|
|
: : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip));
|
|
|
|
|
panic("do_trap: can't hit this");
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
2016-02-17 18:20:12 +00:00
|
|
|
e = search_exception_tables(regs->ip);
|
|
|
|
|
if (!e)
|
|
|
|
|
return 0;
|
2008-01-30 12:31:41 +00:00
|
|
|
|
2021-11-10 10:01:09 +00:00
|
|
|
type = FIELD_GET(EX_DATA_TYPE_MASK, e->data);
|
|
|
|
|
reg = FIELD_GET(EX_DATA_REG_MASK, e->data);
|
|
|
|
|
imm = FIELD_GET(EX_DATA_IMM_MASK, e->data);
|
|
|
|
|
|
|
|
|
|
switch (type) {
|
2021-09-08 13:29:18 +00:00
|
|
|
case EX_TYPE_DEFAULT:
|
2021-09-08 13:29:19 +00:00
|
|
|
case EX_TYPE_DEFAULT_MCE_SAFE:
|
2021-09-08 13:29:18 +00:00
|
|
|
return ex_handler_default(e, regs);
|
|
|
|
|
case EX_TYPE_FAULT:
|
2021-09-08 13:29:19 +00:00
|
|
|
case EX_TYPE_FAULT_MCE_SAFE:
|
2021-09-08 13:29:18 +00:00
|
|
|
return ex_handler_fault(e, regs, trapnr);
|
|
|
|
|
case EX_TYPE_UACCESS:
|
|
|
|
|
return ex_handler_uaccess(e, regs, trapnr);
|
|
|
|
|
case EX_TYPE_COPY:
|
|
|
|
|
return ex_handler_copy(e, regs, trapnr);
|
|
|
|
|
case EX_TYPE_CLEAR_FS:
|
|
|
|
|
return ex_handler_clear_fs(e, regs);
|
|
|
|
|
case EX_TYPE_FPU_RESTORE:
|
|
|
|
|
return ex_handler_fprestore(e, regs);
|
|
|
|
|
case EX_TYPE_BPF:
|
|
|
|
|
return ex_handler_bpf(e, regs);
|
2021-11-10 10:01:10 +00:00
|
|
|
case EX_TYPE_WRMSR:
|
|
|
|
|
return ex_handler_msr(e, regs, true, false, reg);
|
|
|
|
|
case EX_TYPE_RDMSR:
|
|
|
|
|
return ex_handler_msr(e, regs, false, false, reg);
|
|
|
|
|
case EX_TYPE_WRMSR_SAFE:
|
|
|
|
|
return ex_handler_msr(e, regs, true, true, reg);
|
|
|
|
|
case EX_TYPE_RDMSR_SAFE:
|
|
|
|
|
return ex_handler_msr(e, regs, false, true, reg);
|
2021-09-08 13:29:18 +00:00
|
|
|
case EX_TYPE_WRMSR_IN_MCE:
|
|
|
|
|
ex_handler_msr_mce(regs, true);
|
|
|
|
|
break;
|
2021-11-10 10:01:10 +00:00
|
|
|
case EX_TYPE_RDMSR_IN_MCE:
|
|
|
|
|
ex_handler_msr_mce(regs, false);
|
|
|
|
|
break;
|
2022-01-11 11:11:14 +00:00
|
|
|
case EX_TYPE_POP_REG:
|
|
|
|
|
regs->sp += sizeof(long);
|
|
|
|
|
fallthrough;
|
2021-11-10 10:01:09 +00:00
|
|
|
case EX_TYPE_IMM_REG:
|
|
|
|
|
return ex_handler_imm_reg(e, regs, reg, imm);
|
2021-11-10 10:01:20 +00:00
|
|
|
case EX_TYPE_FAULT_SGX:
|
|
|
|
|
return ex_handler_sgx(e, regs, trapnr);
|
2021-11-10 10:01:22 +00:00
|
|
|
case EX_TYPE_UCOPY_LEN:
|
|
|
|
|
return ex_handler_ucopy_len(e, regs, trapnr, reg, imm);
|
2021-09-08 13:29:18 +00:00
|
|
|
}
|
|
|
|
|
BUG();
|
2008-01-30 12:31:41 +00:00
|
|
|
}
|
2012-04-19 22:24:20 +00:00
|
|
|
|
2016-04-02 14:01:34 +00:00
|
|
|
extern unsigned int early_recursion_flag;
|
|
|
|
|
|
2012-04-19 22:24:20 +00:00
|
|
|
/* Restricted version used during very early boot */
|
2016-04-02 14:01:34 +00:00
|
|
|
void __init early_fixup_exception(struct pt_regs *regs, int trapnr)
|
2012-04-19 22:24:20 +00:00
|
|
|
{
|
2016-04-02 14:01:33 +00:00
|
|
|
/* Ignore early NMIs. */
|
|
|
|
|
if (trapnr == X86_TRAP_NMI)
|
2016-04-02 14:01:34 +00:00
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
if (early_recursion_flag > 2)
|
|
|
|
|
goto halt_loop;
|
|
|
|
|
|
2016-11-20 02:42:40 +00:00
|
|
|
/*
|
|
|
|
|
* Old CPUs leave the high bits of CS on the stack
|
|
|
|
|
* undefined. I'm not sure which CPUs do this, but at least
|
|
|
|
|
* the 486 DX works this way.
|
2017-11-24 08:42:21 +00:00
|
|
|
* Xen pv domains are not using the default __KERNEL_CS.
|
2016-11-20 02:42:40 +00:00
|
|
|
*/
|
2017-11-24 08:42:21 +00:00
|
|
|
if (!xen_pv_domain() && regs->cs != __KERNEL_CS)
|
2016-04-02 14:01:34 +00:00
|
|
|
goto fail;
|
2016-04-02 14:01:33 +00:00
|
|
|
|
2016-04-04 15:46:22 +00:00
|
|
|
/*
|
|
|
|
|
* The full exception fixup machinery is available as soon as
|
|
|
|
|
* the early IDT is loaded. This means that it is the
|
|
|
|
|
* responsibility of extable users to either function correctly
|
|
|
|
|
* when handlers are invoked early or to simply avoid causing
|
|
|
|
|
* exceptions before they're ready to handle them.
|
|
|
|
|
*
|
|
|
|
|
* This is better than filtering which handlers can be used,
|
|
|
|
|
* because refusing to call a handler here is guaranteed to
|
|
|
|
|
* result in a hard-to-debug panic.
|
|
|
|
|
*
|
|
|
|
|
* Keep in mind that not all vectors actually get here. Early
|
2018-08-28 20:14:19 +00:00
|
|
|
* page faults, for example, are special.
|
2016-04-04 15:46:22 +00:00
|
|
|
*/
|
2018-08-28 20:14:19 +00:00
|
|
|
if (fixup_exception(regs, trapnr, regs->orig_ax, 0))
|
2016-04-02 14:01:35 +00:00
|
|
|
return;
|
2016-04-02 14:01:34 +00:00
|
|
|
|
2020-06-12 03:26:38 +00:00
|
|
|
if (trapnr == X86_TRAP_UD) {
|
|
|
|
|
if (report_bug(regs->ip, regs) == BUG_TRAP_TYPE_WARN) {
|
|
|
|
|
/* Skip the ud2. */
|
|
|
|
|
regs->ip += LEN_UD2;
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* If this was a BUG and report_bug returns or if this
|
|
|
|
|
* was just a normal #UD, we want to continue onward and
|
|
|
|
|
* crash.
|
|
|
|
|
*/
|
|
|
|
|
}
|
2017-06-12 11:52:46 +00:00
|
|
|
|
2016-04-02 14:01:34 +00:00
|
|
|
fail:
|
|
|
|
|
early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n",
|
|
|
|
|
(unsigned)trapnr, (unsigned long)regs->cs, regs->ip,
|
|
|
|
|
regs->orig_ax, read_cr2());
|
|
|
|
|
|
|
|
|
|
show_regs(regs);
|
|
|
|
|
|
|
|
|
|
halt_loop:
|
|
|
|
|
while (true)
|
|
|
|
|
halt();
|
2012-04-19 22:24:20 +00:00
|
|
|
}
|