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8ad895a6a9
to begin with. Redo newbus attachment code so that all the DMA mapping and further pci attachment is done right. Insert config space functions (jeez- how do you do type 1 cycles?). Do the interrupt setups, etc. Basically, this is the core I/O module for 8200s, even though logically it's the 3rd level down from the nominal principle backplane bus (turbolaser). Still to be done here: S/G code isn't done yet, so we better live with 2GB or less primary memory. |
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| .. | ||
| dwlpx.c | ||
| dwlpxreg.h | ||
| dwlpxvar.h | ||
| gbus.c | ||
| gbusreg.h | ||
| gbusvar.h | ||
| kftxx.c | ||
| kftxxreg.h | ||
| kftxxvar.h | ||
| mcclock_tlsb.c | ||
| tlsb.c | ||
| tlsbcpu.c | ||
| tlsbmem.c | ||
| tlsbreg.h | ||
| tlsbvar.h | ||
| zs_tlsb.c | ||
| zsreg.h | ||
| zsvar.h | ||