Nathan Whitehorn e69dff491d Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64) ... instead of a PCPU field for curthread. This averts a race on SMP systems with a high interrupt rate where the thread looking up the value of curthread could be preempted and migrated between obtaining the PCPU pointer and reading the value of pc_curthread, resulting in curthread being observed to be the current thread on the thread's original CPU. This played merry havoc with the system, in particular with mutexes. Many thanks to jhb for helping me work this one out. Note that Book-E is in principle susceptible to the same problem, but has not been modified yet due to lack of Book-E hardware. MFC after: 2 weeks		2011-06-23 22:21:28 +00:00
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clock.c	After some off-list discussion, revert a number of changes to the	2010-11-22 19:32:54 +00:00
copyinout.c	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
interrupt.c	Remove some dead code: unnecessary isyncs and memory sorting, which are	2011-06-02 14:15:44 +00:00
locore.S	MFppc64:	2010-07-13 05:32:19 +00:00
locore32.S	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
locore64.S	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
machdep.c	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
mmu_oea.c	MFC	2011-06-03 17:09:15 +00:00
mmu_oea64.c	Fix merge typo.	2011-06-23 09:46:12 +00:00
mmu_oea64.h	Add an abstraction layer to the 64-bit AIM MMU's page table manipulation	2010-12-04 02:42:52 +00:00
moea64_if.m	Add an abstraction layer to the 64-bit AIM MMU's page table manipulation	2010-12-04 02:42:52 +00:00
moea64_native.c	Remove some dead code: unnecessary isyncs and memory sorting, which are	2011-06-02 14:15:44 +00:00
mp_cpudep.c	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
nexus.c	Remove unused variables. Spotted by a cppcheck	2011-01-06 20:19:01 +00:00
slb.c	The POWER7 has only 32 SLB slots instead of 64, like other supported	2011-06-02 14:25:52 +00:00
swtch32.S	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
swtch64.S	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
trap.c	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
trap_subr32.S	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
trap_subr64.S	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
uma_machdep.c	Reduce KVA pressure on OEA64 systems running in bridge mode by mapping	2010-02-20 16:23:29 +00:00
vm_machdep.c	For architectures not using direct map , and requiring real KVA page for	2011-01-18 21:57:02 +00:00