mirror of
https://github.com/freebsd/freebsd-src
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072a4ba82a
Sponsored by: Arm Ltd
86 lines
2.7 KiB
C
86 lines
2.7 KiB
C
/*
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* Double-precision SVE log2 function.
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*
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* Copyright (c) 2022-2023, Arm Limited.
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* SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
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*/
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#include "sv_math.h"
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#include "pl_sig.h"
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#include "pl_test.h"
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#if SV_SUPPORTED
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#define InvLn2 sv_f64 (0x1.71547652b82fep0)
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#define N (1 << V_LOG2_TABLE_BITS)
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#define OFF 0x3fe6900900000000
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#define P(i) sv_f64 (__v_log2_data.poly[i])
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NOINLINE static sv_f64_t
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specialcase (sv_f64_t x, sv_f64_t y, const svbool_t cmp)
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{
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return sv_call_f64 (log2, x, y, cmp);
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}
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/* Double-precision SVE log2 routine. Implements the same algorithm as vector
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log10, with coefficients and table entries scaled in extended precision.
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The maximum observed error is 2.58 ULP:
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__v_log2(0x1.0b556b093869bp+0) got 0x1.fffb34198d9dap-5
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want 0x1.fffb34198d9ddp-5. */
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sv_f64_t
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__sv_log2_x (sv_f64_t x, const svbool_t pg)
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{
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sv_u64_t ix = sv_as_u64_f64 (x);
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sv_u64_t top = svlsr_n_u64_x (pg, ix, 48);
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svbool_t special
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= svcmpge_n_u64 (pg, svsub_n_u64_x (pg, top, 0x0010), 0x7ff0 - 0x0010);
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/* x = 2^k z; where z is in range [OFF,2*OFF) and exact.
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The range is split into N subintervals.
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The ith subinterval contains z and c is near its center. */
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sv_u64_t tmp = svsub_n_u64_x (pg, ix, OFF);
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sv_u64_t i
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= sv_mod_n_u64_x (pg, svlsr_n_u64_x (pg, tmp, 52 - V_LOG2_TABLE_BITS), N);
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sv_f64_t k
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= sv_to_f64_s64_x (pg, svasr_n_s64_x (pg, sv_as_s64_u64 (tmp), 52));
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sv_f64_t z = sv_as_f64_u64 (
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svsub_u64_x (pg, ix, svand_n_u64_x (pg, tmp, 0xfffULL << 52)));
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sv_u64_t idx = svmul_n_u64_x (pg, i, 2);
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sv_f64_t invc = sv_lookup_f64_x (pg, &__v_log2_data.tab[0].invc, idx);
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sv_f64_t log2c = sv_lookup_f64_x (pg, &__v_log2_data.tab[0].log2c, idx);
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/* log2(x) = log1p(z/c-1)/log(2) + log2(c) + k. */
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sv_f64_t r = sv_fma_f64_x (pg, z, invc, sv_f64 (-1.0));
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sv_f64_t w = sv_fma_f64_x (pg, r, InvLn2, log2c);
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sv_f64_t r2 = svmul_f64_x (pg, r, r);
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sv_f64_t p_23 = sv_fma_f64_x (pg, P (3), r, P (2));
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sv_f64_t p_01 = sv_fma_f64_x (pg, P (1), r, P (0));
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sv_f64_t y = sv_fma_f64_x (pg, P (4), r2, p_23);
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y = sv_fma_f64_x (pg, y, r2, p_01);
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y = sv_fma_f64_x (pg, y, r2, svadd_f64_x (pg, k, w));
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if (unlikely (svptest_any (pg, special)))
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{
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return specialcase (x, y, special);
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}
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return y;
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}
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PL_ALIAS (__sv_log2_x, _ZGVsMxv_log2)
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PL_SIG (SV, D, 1, log2, 0.01, 11.1)
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PL_TEST_ULP (__sv_log2, 2.09)
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PL_TEST_EXPECT_FENV_ALWAYS (__sv_log2)
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PL_TEST_INTERVAL (__sv_log2, -0.0, -0x1p126, 1000)
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PL_TEST_INTERVAL (__sv_log2, 0.0, 0x1p-126, 4000)
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PL_TEST_INTERVAL (__sv_log2, 0x1p-126, 0x1p-23, 50000)
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PL_TEST_INTERVAL (__sv_log2, 0x1p-23, 1.0, 50000)
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PL_TEST_INTERVAL (__sv_log2, 1.0, 100, 50000)
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PL_TEST_INTERVAL (__sv_log2, 100, inf, 50000)
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#endif
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