Pyun YongHyeon 83c04c93b6 Add another hardware bug workaround for Yukon II controllers that ... have hardware ram buffer. The silicon bug seem to be triggered by pause frames if receive buffer is not aligned on FIFO word(8 bytes). To workaround the issue, make sure to align Rx buffers on 8 bytes. Unfortunately this workaround requires yet another Rx fixup for strict alignment architecture machines to align IP header. For newer hardwares that lacks ram buffer may not have this bug so check number of available ram buffer size to see the existence of ram buffer. Reported by: Ian Freislich (ianf <at> clue dot co dot za), das Tested by: Ian Freislich (ianf <at> clue dot co dot za)		2008-09-25 07:31:45 +00:00
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if_msk.c	Add another hardware bug workaround for Yukon II controllers that	2008-09-25 07:31:45 +00:00
if_mskreg.h	Add another hardware bug workaround for Yukon II controllers that	2008-09-25 07:31:45 +00:00