Marius Strobl 4cf9e21ed8 - Give PIL_PREEMPT the lowest priority just above low/stray interrupts. ... The reason for this is that the SPARC v9 architecture allows nested interrupts of higher priority/level than that of the current interrupt to occur (and we can't just entirely bypass this model, also, at least for tick interrupts, this also wouldn't be wise). However, when a preemption interrupt interrupts another interrupt of lower priority, f.e. PIL_ITHREAD, and that one in turn is nested by a third interrupt, f.e. PIL_TICK, with SCHED_ULE the execution of interrupts higher than PIL_PREEMPT may be migrated to another CPU. In particular, tl1_ret(), which is responsible for restoring the state of the CPU prior to entry to the interrupt based on the (also migrated) trap frame, then is run on a CPU which actually didn't receive the interrupt in question, causing an inappropriate processor interrupt level to be "restored". In turn, this causes interrupts of the first level, i.e. PIL_ITHREAD in the above scenario, to be blocked on the target of the migration until the correct PIL happens to be restored again on that CPU again. Making PIL_PREEMPT the lowest real priority, this effectively prevents this scenario from happening, as preemption interrupts no longer can interrupt any other interrupt besides stray ones (which is no issue). Thanks to attilio@ and especially mav@ for helping me to understand this problem at the 201208DevSummit. - Give PIL_STOP (which is also used for IPI_STOP_HARD, given that there's no real equivalent to NMIs on SPARC v9) the highest possible priority just below the hardwired PIL_TICK, so it has a chance to interrupt more things. MFC after: 1 week		2012-10-20 12:07:48 +00:00
..
central	s,KOBJMETHOD_END,DEVMETHOD_END,g in order to fully hide the explicit mention	2011-11-22 21:55:40 +00:00
compile
conf	Grammar fix: s/NIC's/NICs/	2012-08-26 01:21:02 +00:00
ebus	s,KOBJMETHOD_END,DEVMETHOD_END,g in order to fully hide the explicit mention	2011-11-22 21:55:40 +00:00
fhc	s,KOBJMETHOD_END,DEVMETHOD_END,g in order to fully hide the explicit mention	2011-11-22 21:55:40 +00:00
include	- Give PIL_PREEMPT the lowest priority just above low/stray interrupts.	2012-10-20 12:07:48 +00:00
isa	Retire isa_setup_intr() and isa_teardown_intr() and use the generic bus	2011-05-06 13:48:53 +00:00
pci	Add a global MD macro for the VIS block size instead of duplicating	2012-08-31 11:15:01 +00:00
sbus	s,KOBJMETHOD_END,DEVMETHOD_END,g in order to fully hide the explicit mention	2011-11-22 21:55:40 +00:00
sparc64	- Give PIL_PREEMPT the lowest priority just above low/stray interrupts.	2012-10-20 12:07:48 +00:00