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157 lines
5.7 KiB
C
157 lines
5.7 KiB
C
/*-
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* Copyright (c) 2003-2009 RMI Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of RMI Corporation, nor the names of its contributors,
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RMI_BSD */
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#ifdef XLR_PERFMON
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#ifndef XLRCONFIG_PERFMON_H
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#define XLRCONFIG_PERFMON_H
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#include <mips/rmi/perfmon_utils.h> /* for DPRINT */
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#define NCPUS 32
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#define NCORES 8
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#define NTHREADS 4
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#define PERF_SAMPLE_BUFSZ 32
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/*select timeout is 512*1024 microsecs */
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#define DEFAULT_SYS_SAMPLING_INTERVAL (512*1024)
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/* default timer value programmed to PIC is 10*1024*1024 */
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#define DEFAULT_CPU_SAMPLING_INTERVAL (10*1024)
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#define DEFAULT_CC_SAMPLE_RATE 16
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#define DEFAULT_CP0_FLAGS 0x0A
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#define NUM_L2_BANKS 8
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#define NUM_DRAM_BANKS 4
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/* CP0 register for timestamp */
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#define CP0_COUNT 9
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#define CP0_EIRR_REG 9
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#define CP0_EIRR_SEL 6
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#define CP0_EIMR_REG 9
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#define CP0_EIMR_SEL 7
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/* CP0 register for perf counters */
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#define CP0_PERF_COUNTER 25
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/* selector values */
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#define PERFCNTRCTL0 0
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#define PERFCNTR0 1
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#define PERFCNTRCTL1 2
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#define PERFCNTR1 3
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#define XLR_IO_PIC_OFFSET 0x08000
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#define PIC_SYS_TIMER_0_BASE 0x120
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#define PIC_SYS_TIMER_NUM_6 6
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/* CP2 registers for reading credit counters */
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#define CC_REG0 16
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#define read_c0_register(reg, sel) \
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({ unsigned int __rv; \
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__asm__ __volatile__( \
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".set\tpush\n\t" \
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".set mips32\n\t" \
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"mfc0\t%0,$%1,%2\n\t" \
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".set\tpop" \
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: "=r" (__rv) : "i" (reg), "i" (sel) ); \
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__rv;})
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#define write_c0_register(reg, sel, value) \
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__asm__ __volatile__( \
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".set\tpush\n\t" \
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".set mips32\n\t" \
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"mtc0\t%0,$%1,%2\n\t" \
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".set\tpop" \
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: : "r" (value), "i" (reg), "i" (sel) );
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#define read_c2_register(reg, sel) \
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({ unsigned int __rv; \
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__asm__ __volatile__( \
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".set\tpush\n\t" \
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".set mips32\n\t" \
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"mfc0\t%0,$%1,%2\n\t" \
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".set\tpop" \
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: "=r" (__rv) : "i"(reg), "i" (sel) ); \
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__rv;})
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/*
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* We have 128 registers in C2 credit counters, reading them one at
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* a time using bitmap will take a lot of code, so we have two functions
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* to read registers sel0-3 and sel 4-7 into one 32 bit word.
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*/
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#define read_cc_registers_0123(reg) \
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({ \
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unsigned int __rv; \
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\
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__asm__ __volatile__( \
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".set push\n\t" \
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".set mips32\n\t" \
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".set noreorder\n\t" \
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"mfc2 %0, $%1, 0\n\t" \
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"mfc2 $8, $%1, 1\n\t" \
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"sll %0, %0, 8\n\t" \
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"or %0, %0, $8\n\t" \
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"mfc2 $8, $%1, 2\n\t" \
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"sll %0, %0, 8\n\t" \
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"or %0, %0, $8\n\t" \
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"mfc2 $8, $%1, 3\n\t" \
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"sll %0, %0, 8\n\t" \
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"or %0, %0, $8\n\t" \
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".set pop" \
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: "=r" (__rv) : "i"(reg) : "$8"); \
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\
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__rv; \
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})
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#define read_cc_registers_4567(reg) \
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({ \
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unsigned int __rv; \
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\
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__asm__ __volatile__( \
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".set push\n\t" \
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".set mips32\n\t" \
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".set noreorder\n\t" \
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"mfc2 %0, $%1, 4\n\t" \
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"mfc2 $8, $%1, 5\n\t" \
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"sll %0, %0, 8\n\t" \
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"or %0, %0, $8\n\t" \
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"mfc2 $8, $%1, 6\n\t" \
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"sll %0, %0, 8\n\t" \
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"or %0, %0, $8\n\t" \
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"mfc2 $8, $%1, 7\n\t" \
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"sll %0, %0, 8\n\t" \
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"or %0, %0, $8\n\t" \
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".set pop" \
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: "=r" (__rv) :"i"(reg) : "$8"); \
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\
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__rv; \
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})
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#endif
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#endif
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