Jayachandran C. 480f6157fb sys/mips/rmi/msgring.h - fixes and clean up. ... - Remove sync from msgrng_send, sync needs to be called just once before sending. - Fix retry logic - don't reload registers when retrying in message_send, also fix check for send pending fail. - remove unused message_send_block_fast() - merge message_receive_fast() to message_receive - style(9) fixes, and comments - rge and nlge updated for the sys/mips/rmi/msgring.h changes		2010-09-13 13:11:50 +00:00
..
adm5120	bus_add_child: change type of order parameter to u_int	2010-09-10 11:19:03 +00:00
alchemy	bus_add_child: change type of order parameter to u_int	2010-09-10 11:19:03 +00:00
atheros	bus_add_child: change type of order parameter to u_int	2010-09-10 11:19:03 +00:00
cavium	o) Add the "octusb" controller which supports the first port of the Octeon	2010-07-20 19:32:25 +00:00
compile
conf	Rename TARGET_XLR_XLS to CPU_RMI to match other CPU_xxx definitions.	2010-08-13 12:56:00 +00:00
idt	bus_add_child: change type of order parameter to u_int	2010-09-10 11:19:03 +00:00
include	Refactor timer management code with priority to one-shot operation mode.	2010-09-13 07:25:35 +00:00
malta	Fix MALTA64 build.	2010-04-19 09:03:34 +00:00
mips	Refactor timer management code with priority to one-shot operation mode.	2010-09-13 07:25:35 +00:00
rmi	sys/mips/rmi/msgring.h - fixes and clean up.	2010-09-13 13:11:50 +00:00
sentry5	- Call post-boot fixup function in order to get proper static	2010-01-25 00:44:05 +00:00
sibyte	bus_add_child: change type of order parameter to u_int	2010-09-10 11:19:03 +00:00