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acbc176c3d
Some of these fields are specific to Fabrics controllers (such as the size of capsules) while other fields are shared with PCI-e controllers, but are more relevant for Fabrics controllers (such as KeepAlive timer properties). Reviewed by: imp Sponsored by: Chelsio Communications Differential Revision: https://reviews.freebsd.org/D44449
303 lines
12 KiB
C
303 lines
12 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (C) 2012-2013 Intel Corporation
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* All rights reserved.
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* Copyright (C) 2018-2019 Alexander Motin <mav@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <ctype.h>
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#include <err.h>
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#include <fcntl.h>
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#include <stddef.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include "nvmecontrol.h"
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#include "nvmecontrol_ext.h"
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void
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nvme_print_controller(struct nvme_controller_data *cdata)
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{
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uint8_t str[128];
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char cbuf[UINT128_DIG + 1];
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uint16_t oncs, oacs;
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uint8_t compare, write_unc, dsm, t;
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uint8_t security, fmt, fw, nsmgmt;
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uint8_t fw_slot1_ro, fw_num_slots;
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uint8_t ns_smart;
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uint8_t sqes_max, sqes_min;
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uint8_t cqes_max, cqes_min;
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uint8_t fwug;
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oncs = cdata->oncs;
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compare = NVMEV(NVME_CTRLR_DATA_ONCS_COMPARE, oncs);
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write_unc = NVMEV(NVME_CTRLR_DATA_ONCS_WRITE_UNC, oncs);
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dsm = NVMEV(NVME_CTRLR_DATA_ONCS_DSM, oncs);
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oacs = cdata->oacs;
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security = NVMEV(NVME_CTRLR_DATA_OACS_SECURITY, oacs);
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fmt = NVMEV(NVME_CTRLR_DATA_OACS_FORMAT, oacs);
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fw = NVMEV(NVME_CTRLR_DATA_OACS_FIRMWARE, oacs);
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nsmgmt = NVMEV(NVME_CTRLR_DATA_OACS_NSMGMT, oacs);
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fw_num_slots = NVMEV(NVME_CTRLR_DATA_FRMW_NUM_SLOTS, cdata->frmw);
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fw_slot1_ro = NVMEV(NVME_CTRLR_DATA_FRMW_SLOT1_RO, cdata->frmw);
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fwug = cdata->fwug;
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ns_smart = NVMEV(NVME_CTRLR_DATA_LPA_NS_SMART, cdata->lpa);
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sqes_min = NVMEV(NVME_CTRLR_DATA_SQES_MIN, cdata->sqes);
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sqes_max = NVMEV(NVME_CTRLR_DATA_SQES_MAX, cdata->sqes);
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cqes_min = NVMEV(NVME_CTRLR_DATA_CQES_MIN, cdata->cqes);
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cqes_max = NVMEV(NVME_CTRLR_DATA_CQES_MAX, cdata->cqes);
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printf("Controller Capabilities/Features\n");
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printf("================================\n");
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printf("Vendor ID: %04x\n", cdata->vid);
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printf("Subsystem Vendor ID: %04x\n", cdata->ssvid);
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nvme_strvis(str, cdata->sn, sizeof(str), NVME_SERIAL_NUMBER_LENGTH);
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printf("Serial Number: %s\n", str);
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nvme_strvis(str, cdata->mn, sizeof(str), NVME_MODEL_NUMBER_LENGTH);
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printf("Model Number: %s\n", str);
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nvme_strvis(str, cdata->fr, sizeof(str), NVME_FIRMWARE_REVISION_LENGTH);
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printf("Firmware Version: %s\n", str);
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printf("Recommended Arb Burst: %d\n", cdata->rab);
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printf("IEEE OUI Identifier: %02x %02x %02x\n",
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cdata->ieee[2], cdata->ieee[1], cdata->ieee[0]);
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printf("Multi-Path I/O Capabilities: %s%s%s%s%s\n",
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(cdata->mic == 0) ? "Not Supported" : "",
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NVMEV(NVME_CTRLR_DATA_MIC_ANAR, cdata->mic) != 0 ?
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"Asymmetric, " : "",
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NVMEV(NVME_CTRLR_DATA_MIC_SRIOVVF, cdata->mic) != 0 ?
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"SR-IOV VF, " : "",
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NVMEV(NVME_CTRLR_DATA_MIC_MCTRLRS, cdata->mic) != 0 ?
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"Multiple controllers, " : "",
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NVMEV(NVME_CTRLR_DATA_MIC_MPORTS, cdata->mic) != 0 ?
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"Multiple ports" : "");
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/* TODO: Use CAP.MPSMIN to determine true memory page size. */
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printf("Max Data Transfer Size: ");
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if (cdata->mdts == 0)
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printf("Unlimited\n");
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else
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printf("%ld bytes\n", PAGE_SIZE * (1L << cdata->mdts));
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printf("Sanitize Crypto Erase: %s\n",
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NVMEV(NVME_CTRLR_DATA_SANICAP_CES, cdata->sanicap) != 0 ?
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"Supported" : "Not Supported");
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printf("Sanitize Block Erase: %s\n",
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NVMEV(NVME_CTRLR_DATA_SANICAP_BES, cdata->sanicap) != 0 ?
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"Supported" : "Not Supported");
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printf("Sanitize Overwrite: %s\n",
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NVMEV(NVME_CTRLR_DATA_SANICAP_OWS, cdata->sanicap) != 0 ?
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"Supported" : "Not Supported");
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printf("Sanitize NDI: %s\n",
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NVMEV(NVME_CTRLR_DATA_SANICAP_NDI, cdata->sanicap) != 0 ?
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"Supported" : "Not Supported");
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printf("Sanitize NODMMAS: ");
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switch (NVMEV(NVME_CTRLR_DATA_SANICAP_NODMMAS, cdata->sanicap)) {
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case NVME_CTRLR_DATA_SANICAP_NODMMAS_UNDEF:
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printf("Undefined\n");
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break;
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case NVME_CTRLR_DATA_SANICAP_NODMMAS_NO:
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printf("No\n");
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break;
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case NVME_CTRLR_DATA_SANICAP_NODMMAS_YES:
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printf("Yes\n");
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break;
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default:
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printf("Unknown\n");
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break;
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}
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printf("Controller ID: 0x%04x\n", cdata->ctrlr_id);
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printf("Version: %d.%d.%d\n",
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(cdata->ver >> 16) & 0xffff, (cdata->ver >> 8) & 0xff,
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cdata->ver & 0xff);
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printf("Traffic Based Keep Alive: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_CTRATT_TBKAS, cdata->ctratt) ? "" : "Not ");
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printf("Controller Type: ");
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switch (cdata->cntrltype) {
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case 0:
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printf("Not Reported\n");
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break;
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case 1:
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printf("I/O Controller\n");
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break;
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case 2:
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printf("Discovery Controller\n");
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break;
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case 3:
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printf("Administrative Controller\n");
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break;
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default:
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printf("%d (Reserved)\n", cdata->cntrltype);
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break;
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}
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printf("Keep Alive Timer ");
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if (cdata->kas == 0)
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printf("Not Supported\n");
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else
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printf("%u ms granularity\n", cdata->kas * 100);
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printf("Maximum Outstanding Commands ");
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if (cdata->maxcmd == 0)
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printf("Not Specified\n");
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else
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printf("%u\n", cdata->maxcmd);
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printf("\n");
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printf("Admin Command Set Attributes\n");
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printf("============================\n");
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printf("Security Send/Receive: %s\n",
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security ? "Supported" : "Not Supported");
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printf("Format NVM: %s\n",
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fmt ? "Supported" : "Not Supported");
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printf("Firmware Activate/Download: %s\n",
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fw ? "Supported" : "Not Supported");
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printf("Namespace Management: %s\n",
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nsmgmt ? "Supported" : "Not Supported");
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printf("Device Self-test: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_OACS_SELFTEST, oacs) != 0 ? "" : "Not ");
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printf("Directives: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_OACS_DIRECTIVES, oacs) != 0 ? "" : "Not ");
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printf("NVMe-MI Send/Receive: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_OACS_NVMEMI, oacs) != 0 ? "" : "Not ");
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printf("Virtualization Management: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_OACS_VM, oacs) != 0 ? "" : "Not ");
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printf("Doorbell Buffer Config: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_OACS_DBBUFFER, oacs) != 0 ? "" : "Not ");
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printf("Get LBA Status: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_OACS_GETLBA, oacs) != 0 ? "" : "Not ");
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printf("Sanitize: ");
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if (cdata->sanicap != 0) {
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printf("%s%s%s\n",
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NVMEV(NVME_CTRLR_DATA_SANICAP_CES, cdata->sanicap) != 0 ?
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"crypto, " : "",
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NVMEV(NVME_CTRLR_DATA_SANICAP_BES, cdata->sanicap) != 0 ?
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"block, " : "",
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NVMEV(NVME_CTRLR_DATA_SANICAP_OWS, cdata->sanicap) != 0 ?
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"overwrite" : "");
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} else {
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printf("Not Supported\n");
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}
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printf("Abort Command Limit: %d\n", cdata->acl+1);
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printf("Async Event Request Limit: %d\n", cdata->aerl+1);
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printf("Number of Firmware Slots: %d\n", fw_num_slots);
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printf("Firmware Slot 1 Read-Only: %s\n", fw_slot1_ro ? "Yes" : "No");
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printf("Per-Namespace SMART Log: %s\n",
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ns_smart ? "Yes" : "No");
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printf("Error Log Page Entries: %d\n", cdata->elpe+1);
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printf("Number of Power States: %d\n", cdata->npss+1);
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if (cdata->ver >= 0x010200) {
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printf("Total NVM Capacity: %s bytes\n",
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uint128_to_str(to128(cdata->untncap.tnvmcap),
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cbuf, sizeof(cbuf)));
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printf("Unallocated NVM Capacity: %s bytes\n",
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uint128_to_str(to128(cdata->untncap.unvmcap),
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cbuf, sizeof(cbuf)));
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}
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printf("Firmware Update Granularity: %02x ", fwug);
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if (fwug == 0)
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printf("(Not Reported)\n");
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else if (fwug == 0xFF)
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printf("(No Granularity)\n");
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else
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printf("(%d bytes)\n", ((uint32_t)fwug << 12));
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printf("Host Buffer Preferred Size: %llu bytes\n",
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(long long unsigned)cdata->hmpre * 4096);
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printf("Host Buffer Minimum Size: %llu bytes\n",
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(long long unsigned)cdata->hmmin * 4096);
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printf("\n");
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printf("NVM Command Set Attributes\n");
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printf("==========================\n");
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printf("Submission Queue Entry Size\n");
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printf(" Max: %d\n", 1 << sqes_max);
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printf(" Min: %d\n", 1 << sqes_min);
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printf("Completion Queue Entry Size\n");
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printf(" Max: %d\n", 1 << cqes_max);
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printf(" Min: %d\n", 1 << cqes_min);
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printf("Number of Namespaces: %d\n", cdata->nn);
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printf("Compare Command: %s\n",
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compare ? "Supported" : "Not Supported");
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printf("Write Uncorrectable Command: %s\n",
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write_unc ? "Supported" : "Not Supported");
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printf("Dataset Management Command: %s\n",
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dsm ? "Supported" : "Not Supported");
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printf("Write Zeroes Command: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_ONCS_WRZERO, oncs) != 0 ? "" : "Not ");
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printf("Save Features: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_ONCS_SAVEFEAT, oncs) != 0 ? "" : "Not ");
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printf("Reservations: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_ONCS_RESERV, oncs) != 0 ? "" : "Not ");
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printf("Timestamp feature: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_ONCS_TIMESTAMP, oncs) != 0 ? "" : "Not ");
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printf("Verify feature: %sSupported\n",
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NVMEV(NVME_CTRLR_DATA_ONCS_VERIFY, oncs) != 0 ? "" : "Not ");
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printf("Fused Operation Support: %s%s\n",
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(cdata->fuses == 0) ? "Not Supported" : "",
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NVMEV(NVME_CTRLR_DATA_FUSES_CNW, cdata->fuses) != 0 ?
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"Compare and Write" : "");
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printf("Format NVM Attributes: %s%s Erase, %s Format\n",
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NVMEV(NVME_CTRLR_DATA_FNA_CRYPTO_ERASE, cdata->fna) != 0 ?
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"Crypto Erase, " : "",
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NVMEV(NVME_CTRLR_DATA_FNA_ERASE_ALL, cdata->fna) != 0 ?
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"All-NVM" : "Per-NS",
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NVMEV(NVME_CTRLR_DATA_FNA_FORMAT_ALL, cdata->fna) != 0 ?
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"All-NVM" : "Per-NS");
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t = NVMEV(NVME_CTRLR_DATA_VWC_ALL, cdata->vwc);
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printf("Volatile Write Cache: %s%s\n",
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NVMEV(NVME_CTRLR_DATA_VWC_PRESENT, cdata->vwc) != 0 ?
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"Present" : "Not Present",
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(t == NVME_CTRLR_DATA_VWC_ALL_NO) ? ", no flush all" :
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(t == NVME_CTRLR_DATA_VWC_ALL_YES) ? ", flush all" : "");
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if (cdata->ver >= 0x010201)
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printf("\nNVM Subsystem Name: %.256s\n", cdata->subnqn);
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if (cdata->ioccsz != 0) {
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printf("\n");
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printf("Fabrics Attributes\n");
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printf("==================\n");
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printf("I/O Command Capsule Size: %d bytes\n",
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cdata->ioccsz * 16);
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printf("I/O Response Capsule Size: %d bytes\n",
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cdata->iorcsz * 16);
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printf("In Capsule Data Offset: %d bytes\n",
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cdata->icdoff * 16);
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printf("Controller Model: %s\n",
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(cdata->fcatt & 1) == 0 ? "Dynamic" : "Static");
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printf("Max SGL Descriptors: ");
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if (cdata->msdbd == 0)
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printf("Unlimited\n");
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else
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printf("%d\n", cdata->msdbd);
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printf("Disconnect of I/O Queues: %sSupported\n",
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(cdata->ofcs & 1) == 1 ? "" : "Not ");
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}
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}
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