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d2c5276d96
tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
322 lines
9.1 KiB
C
322 lines
9.1 KiB
C
/*-
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* Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
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* Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
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* Copyright (c) 2000 BSDi
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* Copyright (c) 2001, 2003 Thomas Moestl <tmm@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: FreeBSD: src/sys/dev/pci/pci_pci.c,v 1.3 2000/12/13
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*
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* $FreeBSD$
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*/
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/*
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* Support for the Sun APB (Advanced PCI Bridge) PCI-PCI bridge.
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* This bridge does not fully comply to the PCI bridge specification, and is
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* therefore not supported by the generic driver.
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* We can use some pf the pcib methods anyway.
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*/
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#include "opt_ofw_pci.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_pci.h>
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#include <machine/bus.h>
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#include <machine/ofw_bus.h>
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#include <machine/resource.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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#include <sparc64/pci/ofw_pci.h>
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#include <sparc64/pci/ofw_pcib_subr.h>
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/*
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* Bridge-specific data.
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*/
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struct apb_softc {
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struct ofw_pcib_gen_softc sc_bsc;
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u_int8_t sc_iomap;
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u_int8_t sc_memmap;
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};
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static device_probe_t apb_probe;
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static device_attach_t apb_attach;
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static bus_alloc_resource_t apb_alloc_resource;
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#ifndef OFW_NEWPCI
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static pcib_route_interrupt_t apb_route_interrupt;
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#endif
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static device_method_t apb_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, apb_probe),
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DEVMETHOD(device_attach, apb_attach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_read_ivar, pcib_read_ivar),
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DEVMETHOD(bus_write_ivar, pcib_write_ivar),
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DEVMETHOD(bus_alloc_resource, apb_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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/* pcib interface */
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DEVMETHOD(pcib_maxslots, pcib_maxslots),
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DEVMETHOD(pcib_read_config, pcib_read_config),
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DEVMETHOD(pcib_write_config, pcib_write_config),
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#ifdef OFW_NEWPCI
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DEVMETHOD(pcib_route_interrupt, ofw_pcib_gen_route_interrupt),
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#else
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DEVMETHOD(pcib_route_interrupt, apb_route_interrupt),
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#endif
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/* ofw_pci interface */
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#ifdef OFW_NEWPCI
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DEVMETHOD(ofw_pci_get_node, ofw_pcib_gen_get_node),
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DEVMETHOD(ofw_pci_adjust_busrange, ofw_pcib_gen_adjust_busrange),
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#endif
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{ 0, 0 }
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};
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static driver_t apb_driver = {
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"pcib",
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apb_methods,
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sizeof(struct apb_softc),
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};
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DRIVER_MODULE(apb, pci, apb_driver, pcib_devclass, 0, 0);
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/* APB specific registers */
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#define APBR_IOMAP 0xde
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#define APBR_MEMMAP 0xdf
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/* Definitions for the mapping registers */
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#define APB_IO_SCALE 0x200000
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#define APB_MEM_SCALE 0x20000000
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/*
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* Generic device interface
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*/
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static int
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apb_probe(device_t dev)
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{
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if (pci_get_vendor(dev) == 0x108e && /* Sun */
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pci_get_device(dev) == 0x5000) { /* APB */
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device_set_desc(dev, "APB PCI-PCI bridge");
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return (0);
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}
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return (ENXIO);
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}
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static void
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apb_map_print(u_int8_t map, u_long scale)
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{
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int i, first;
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for (first = 1, i = 0; i < 8; i++) {
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if ((map & (1 << i)) != 0) {
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printf("%s0x%lx-0x%lx", first ? "" : ", ",
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i * scale, (i + 1) * scale - 1);
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first = 0;
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}
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}
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}
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static int
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apb_map_checkrange(u_int8_t map, u_long scale, u_long start, u_long end)
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{
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int i, ei;
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i = start / scale;
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ei = end / scale;
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if (i > 7 || ei > 7)
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return (0);
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for (; i <= ei; i++)
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if ((map & (1 << i)) == 0)
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return (0);
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return (1);
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}
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static int
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apb_attach(device_t dev)
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{
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struct apb_softc *sc;
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sc = device_get_softc(dev);
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/*
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* Get current bridge configuration.
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*/
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sc->sc_iomap = pci_read_config(dev, APBR_IOMAP, 1);
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sc->sc_memmap = pci_read_config(dev, APBR_MEMMAP, 1);
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#ifdef OFW_NEWPCI
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ofw_pcib_gen_setup(dev);
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#else
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sc->sc_bsc.ops_pcib_sc.dev = dev;
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sc->sc_bsc.ops_pcib_sc.secbus = pci_read_config(dev, PCIR_SECBUS_1, 1);
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sc->sc_bsc.ops_pcib_sc.subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
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#endif
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if (bootverbose) {
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device_printf(dev, " secondary bus %d\n",
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sc->sc_bsc.ops_pcib_sc.secbus);
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device_printf(dev, " subordinate bus %d\n",
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sc->sc_bsc.ops_pcib_sc.subbus);
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device_printf(dev, " I/O decode ");
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apb_map_print(sc->sc_iomap, APB_IO_SCALE);
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printf("\n");
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device_printf(dev, " memory decode ");
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apb_map_print(sc->sc_memmap, APB_MEM_SCALE);
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printf("\n");
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}
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#ifndef OFW_NEWPCI
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if (sc->sc_bsc.ops_pcib_sc.secbus == 0)
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panic("apb_attach: APB with uninitialized secbus");
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#endif
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device_add_child(dev, "pci", sc->sc_bsc.ops_pcib_sc.secbus);
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return (bus_generic_attach(dev));
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}
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/*
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* We have to trap resource allocation requests and ensure that the bridge
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* is set up to, or capable of handling them.
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*/
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static struct resource *
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apb_alloc_resource(device_t dev, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct apb_softc *sc;
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sc = device_get_softc(dev);
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/*
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* If this is a "default" allocation against this rid, we can't work
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* out where it's coming from (we should actually never see these) so we
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* just have to punt.
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*/
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if ((start == 0) && (end == ~0)) {
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device_printf(dev, "can't decode default resource id %d for "
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"%s%d, bypassing\n", *rid, device_get_name(child),
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device_get_unit(child));
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} else {
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/*
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* Fail the allocation for this range if it's not supported.
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* XXX we should probably just fix up the bridge decode and
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* soldier on.
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*/
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switch (type) {
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case SYS_RES_IOPORT:
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if (!apb_map_checkrange(sc->sc_iomap, APB_IO_SCALE,
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start, end)) {
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device_printf(dev, "device %s%d requested "
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"unsupported I/O range 0x%lx-0x%lx\n",
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device_get_name(child),
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device_get_unit(child), start, end);
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return (NULL);
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}
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if (bootverbose)
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device_printf(sc->sc_bsc.ops_pcib_sc.dev,
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"device %s%d requested decoded I/O range "
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"0x%lx-0x%lx\n", device_get_name(child),
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device_get_unit(child), start, end);
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break;
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case SYS_RES_MEMORY:
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if (!apb_map_checkrange(sc->sc_memmap, APB_MEM_SCALE,
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start, end)) {
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device_printf(dev, "device %s%d requested "
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"unsupported memory range 0x%lx-0x%lx\n",
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device_get_name(child),
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device_get_unit(child), start, end);
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return (NULL);
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}
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if (bootverbose)
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device_printf(sc->sc_bsc.ops_pcib_sc.dev,
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"device %s%d requested decoded memory "
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"range 0x%lx-0x%lx\n",
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device_get_name(child),
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device_get_unit(child), start, end);
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break;
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default:
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break;
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}
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}
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/*
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* Bridge is OK decoding this resource, so pass it up.
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*/
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return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
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count, flags));
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}
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#ifndef OFW_NEWPCI
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/*
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* Route an interrupt across a PCI bridge - we need to rely on the firmware
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* here.
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*/
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static int
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apb_route_interrupt(device_t pcib, device_t dev, int pin)
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{
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/*
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* XXX: ugly loathsome hack:
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* We can't use ofw_pci_route_intr() here; the device passed may be
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* the one of a bridge, so the original device can't be recovered.
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*
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* We need to use the firmware to route interrupts, however it has
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* no interface which could be used to interpret intpins; instead,
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* all assignments are done by device.
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*
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* The MI pci code will try to reroute interrupts of 0, although they
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* are correct; all other interrupts are preinitialized, so if we
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* get here, the intline is either 0 (so return 0), or we hit a
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* device which was not preinitialized (e.g. hotplugged stuff), in
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* which case we are lost.
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*/
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return (0);
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}
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#endif /* !OFW_NEWPCI */
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