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103d39efe0
On RISC-V, the root PIC (whether the PLIC or, as will be the case in future, the local interrupt controller) cannot send IPIs, relying on another means to trigger the necessary software interrupts (firmware calls), but there are upcoming standard devices that will be able to inject them, so we can't just put the firmware calls in the root PIC driver. Thus, split out a new intr_ipi_dev from intr_irq_root_dev to use for sending IPIs. New devices can be registered with a given priority up until the first IPI is set up, when the best device seen so far gets frozen as the IPI device to use. Reviewed by: mhorne MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D35899
167 lines
5.3 KiB
C
167 lines
5.3 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2015-2016 Svatopluk Kraus
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* Copyright (c) 2015-2016 Michal Meloun
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _SYS_INTR_H_
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#define _SYS_INTR_H_
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#ifndef INTRNG
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#error Need INTRNG for this file
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#endif
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#include <sys/systm.h>
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#define INTR_IRQ_INVALID 0xFFFFFFFF
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enum intr_map_data_type {
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INTR_MAP_DATA_ACPI = 0,
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INTR_MAP_DATA_FDT,
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INTR_MAP_DATA_GPIO,
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INTR_MAP_DATA_MSI,
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/* Placeholders for platform specific types */
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INTR_MAP_DATA_PLAT_1 = 1000,
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INTR_MAP_DATA_PLAT_2,
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INTR_MAP_DATA_PLAT_3,
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INTR_MAP_DATA_PLAT_4,
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INTR_MAP_DATA_PLAT_5,
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};
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struct intr_map_data {
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size_t len;
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enum intr_map_data_type type;
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};
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struct intr_map_data_msi {
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struct intr_map_data hdr;
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struct intr_irqsrc *isrc;
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};
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#ifdef notyet
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#define INTR_SOLO INTR_MD1
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typedef int intr_irq_filter_t(void *arg, struct trapframe *tf);
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#else
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typedef int intr_irq_filter_t(void *arg);
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#endif
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typedef int intr_child_irq_filter_t(void *arg, uintptr_t irq);
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#define INTR_ISRC_NAMELEN (MAXCOMLEN + 1)
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#define INTR_ISRCF_IPI 0x01 /* IPI interrupt */
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#define INTR_ISRCF_PPI 0x02 /* PPI interrupt */
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#define INTR_ISRCF_BOUND 0x04 /* bound to a CPU */
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struct intr_pic;
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/* Interrupt source definition. */
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struct intr_irqsrc {
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device_t isrc_dev; /* where isrc is mapped */
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u_int isrc_irq; /* unique identificator */
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u_int isrc_flags;
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char isrc_name[INTR_ISRC_NAMELEN];
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cpuset_t isrc_cpu; /* on which CPUs is enabled */
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u_int isrc_index;
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u_long * isrc_count;
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u_int isrc_handlers;
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struct intr_event * isrc_event;
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#ifdef INTR_SOLO
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intr_irq_filter_t * isrc_filter;
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void * isrc_arg;
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#endif
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/* Used by MSI interrupts to store the iommu details */
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void * isrc_iommu;
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};
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/* Intr interface for PIC. */
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int intr_isrc_deregister(struct intr_irqsrc *);
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int intr_isrc_register(struct intr_irqsrc *, device_t, u_int, const char *, ...)
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__printflike(4, 5);
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#ifdef SMP
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bool intr_isrc_init_on_cpu(struct intr_irqsrc *isrc, u_int cpu);
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#endif
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int intr_isrc_dispatch(struct intr_irqsrc *, struct trapframe *);
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u_int intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask);
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struct intr_pic *intr_pic_register(device_t, intptr_t);
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int intr_pic_deregister(device_t, intptr_t);
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int intr_pic_claim_root(device_t, intptr_t, intr_irq_filter_t *, void *);
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int intr_pic_add_handler(device_t, struct intr_pic *,
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intr_child_irq_filter_t *, void *, uintptr_t, uintptr_t);
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bool intr_is_per_cpu(struct resource *);
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extern device_t intr_irq_root_dev;
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/* Intr interface for BUS. */
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int intr_activate_irq(device_t, struct resource *);
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int intr_deactivate_irq(device_t, struct resource *);
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int intr_setup_irq(device_t, struct resource *, driver_filter_t, driver_intr_t,
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void *, int, void **);
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int intr_teardown_irq(device_t, struct resource *, void *);
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int intr_describe_irq(device_t, struct resource *, void *, const char *);
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int intr_child_irq_handler(struct intr_pic *, uintptr_t);
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/* Intr resources mapping. */
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struct intr_map_data *intr_alloc_map_data(enum intr_map_data_type, size_t, int);
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void intr_free_intr_map_data(struct intr_map_data *);
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u_int intr_map_irq(device_t, intptr_t, struct intr_map_data *);
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void intr_unmap_irq(u_int );
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u_int intr_map_clone_irq(u_int );
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/* MSI/MSI-X handling */
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int intr_msi_register(device_t, intptr_t);
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int intr_alloc_msi(device_t, device_t, intptr_t, int, int, int *);
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int intr_release_msi(device_t, device_t, intptr_t, int, int *);
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int intr_map_msi(device_t, device_t, intptr_t, int, uint64_t *, uint32_t *);
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int intr_alloc_msix(device_t, device_t, intptr_t, int *);
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int intr_release_msix(device_t, device_t, intptr_t, int);
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#ifdef SMP
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int intr_bind_irq(device_t, struct resource *, int);
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void intr_pic_init_secondary(void);
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#endif
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extern u_int intr_nirq; /* number of IRQs on intrng platforms */
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/* Intr interface for IPIs. */
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#ifdef SMP
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typedef void intr_ipi_handler_t(void *);
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int intr_ipi_pic_register(device_t dev, u_int priority);
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void intr_ipi_setup(u_int ipi, const char *name, intr_ipi_handler_t *hand,
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void *arg);
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void intr_ipi_send(cpuset_t cpus, u_int ipi);
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void intr_ipi_dispatch(u_int ipi);
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#endif
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#endif /* _SYS_INTR_H */
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