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a9fc9d6d15
While we only support 4-byte registers in the uart code the physical access may be to an 8-byte register. Support this as an option on non-i386. On i386 we lack the needed 8-byte bus_space functions. ACPI has an option for 8-byte register io width, and FDT can be given any size. Support these sizes, even if we don't expect to see hardware with an 8-byte io width. Reviewed by: imp Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D43374
140 lines
4 KiB
C
140 lines
4 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2003 Marcel Moolenaar
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_UART_H_
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#define _DEV_UART_H_
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#include <sys/linker_set.h>
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/*
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* Bus access structure. This structure holds the minimum information needed
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* to access the UART. The rclk field, although not important to actually
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* access the UART, is important for baudrate programming, delay loops and
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* other timing related computations.
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*/
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struct uart_bas {
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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u_int chan;
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u_int rclk;
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u_int regshft;
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u_int regiowidth;
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u_int busy_detect;
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};
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#define uart_regofs(bas, reg) ((reg) << (bas)->regshft)
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#define uart_regiowidth(bas) ((bas)->regiowidth)
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static inline uint32_t
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uart_getreg(struct uart_bas *bas, int reg)
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{
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uint32_t ret;
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switch (uart_regiowidth(bas)) {
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#if !defined(__i386__)
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case 8:
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ret = bus_space_read_8(bas->bst, bas->bsh, uart_regofs(bas, reg));
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break;
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#endif
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case 4:
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ret = bus_space_read_4(bas->bst, bas->bsh, uart_regofs(bas, reg));
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break;
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case 2:
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ret = bus_space_read_2(bas->bst, bas->bsh, uart_regofs(bas, reg));
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break;
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default:
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ret = bus_space_read_1(bas->bst, bas->bsh, uart_regofs(bas, reg));
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break;
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}
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return (ret);
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}
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static inline void
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uart_setreg(struct uart_bas *bas, int reg, uint32_t value)
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{
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switch (uart_regiowidth(bas)) {
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#if !defined(__i386__)
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case 8:
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bus_space_write_8(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
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break;
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#endif
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case 4:
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bus_space_write_4(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
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break;
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case 2:
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bus_space_write_2(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
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break;
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default:
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bus_space_write_1(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
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break;
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}
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}
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/*
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* XXX we don't know the length of the bus space address range in use by
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* the UART. Since barriers don't use the length field currently, we put
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* a zero there for now.
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*/
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#define uart_barrier(bas) \
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bus_space_barrier((bas)->bst, (bas)->bsh, 0, 0, \
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BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
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/*
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* UART device classes.
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*/
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struct uart_class;
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SET_DECLARE(uart_class_set, struct uart_class);
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extern struct uart_class uart_ns8250_class __attribute__((weak));
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extern struct uart_class uart_quicc_class __attribute__((weak));
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extern struct uart_class uart_z8530_class __attribute__((weak));
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/*
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* Device flags.
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*/
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#define UART_FLAGS_CONSOLE(f) ((f) & 0x10)
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#define UART_FLAGS_DBGPORT(f) ((f) & 0x80)
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#define UART_FLAGS_FCR_RX_LOW(f) ((f) & 0x100)
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#define UART_FLAGS_FCR_RX_MEDL(f) ((f) & 0x200)
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#define UART_FLAGS_FCR_RX_MEDH(f) ((f) & 0x400)
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#define UART_FLAGS_FCR_RX_HIGH(f) ((f) & 0x800)
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/*
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* Data parity values (magical numbers related to ns8250).
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*/
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#define UART_PARITY_NONE 0
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#define UART_PARITY_ODD 1
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#define UART_PARITY_EVEN 3
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#define UART_PARITY_MARK 5
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#define UART_PARITY_SPACE 7
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#endif /* _DEV_UART_H_ */
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