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167 lines
4.3 KiB
C
167 lines
4.3 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#ifndef __QCOM_TLMM_VAR_H__
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#define __QCOM_TLMM_VAR_H__
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#define GPIO_LOCK(_sc) mtx_lock(&(_sc)->gpio_mtx)
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#define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->gpio_mtx)
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#define GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->gpio_mtx, MA_OWNED)
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/*
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* register space access macros
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*/
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#define GPIO_WRITE(sc, reg, val) do { \
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bus_write_4(sc->gpio_mem_res, (reg), (val)); \
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} while (0)
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#define GPIO_READ(sc, reg) bus_read_4(sc->gpio_mem_res, (reg))
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#define GPIO_SET_BITS(sc, reg, bits) \
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GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) | (bits))
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#define GPIO_CLEAR_BITS(sc, reg, bits) \
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GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) & ~(bits))
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enum prop_id {
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PIN_ID_BIAS_DISABLE = 0,
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PIN_ID_BIAS_HIGH_IMPEDANCE,
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PIN_ID_BIAS_BUS_HOLD,
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PIN_ID_BIAS_PULL_UP,
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PIN_ID_BIAS_PULL_DOWN,
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PIN_ID_BIAS_PULL_PIN_DEFAULT,
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PIN_ID_DRIVE_PUSH_PULL,
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PIN_ID_DRIVE_OPEN_DRAIN,
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PIN_ID_DRIVE_OPEN_SOURCE,
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PIN_ID_DRIVE_STRENGTH,
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PIN_ID_INPUT_ENABLE,
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PIN_ID_INPUT_DISABLE,
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PIN_ID_INPUT_SCHMITT_ENABLE,
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PIN_ID_INPUT_SCHMITT_DISABLE,
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PIN_ID_INPUT_DEBOUNCE,
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PIN_ID_POWER_SOURCE,
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PIN_ID_SLEW_RATE,
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PIN_ID_LOW_POWER_MODE_ENABLE,
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PIN_ID_LOW_POWER_MODE_DISABLE,
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PIN_ID_OUTPUT_LOW,
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PIN_ID_OUTPUT_HIGH,
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PIN_ID_VM_ENABLE,
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PIN_ID_VM_DISABLE,
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PROP_ID_MAX_ID
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};
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struct qcom_tlmm_prop_name {
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const char *name;
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enum prop_id id;
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int have_value;
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};
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/*
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* Pull-up / pull-down configuration.
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*/
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typedef enum {
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QCOM_TLMM_PIN_PUPD_CONFIG_DISABLE = 0,
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QCOM_TLMM_PIN_PUPD_CONFIG_PULL_DOWN = 1,
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QCOM_TLMM_PIN_PUPD_CONFIG_PULL_UP = 2,
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QCOM_TLMM_PIN_PUPD_CONFIG_BUS_HOLD = 3,
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} qcom_tlmm_pin_pupd_config_t;
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/*
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* Pull-up / pull-down resistor configuration.
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*/
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typedef enum {
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QCOM_TLMM_PIN_RESISTOR_PUPD_CONFIG_10K = 0,
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QCOM_TLMM_PIN_RESISTOR_PUPD_CONFIG_1K5 = 1,
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QCOM_TLMM_PIN_RESISTOR_PUPD_CONFIG_35K = 2,
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QCOM_TLMM_PIN_RESISTOR_PUPD_CONFIG_20K = 3,
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} qcom_tlmm_pin_resistor_pupd_config_t;
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/*
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* configuration for one pin group.
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*/
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struct qcom_tlmm_pinctrl_cfg {
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char *function;
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int params[PROP_ID_MAX_ID];
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};
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#define GDEF(_id, ...) \
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{ \
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.id = _id, \
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.name = "gpio" #_id, \
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.functions = {"gpio", __VA_ARGS__} \
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}
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struct qcom_tlmm_gpio_mux {
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int id;
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char *name;
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char *functions[16]; /* XXX */
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};
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#define SDEF(n, r, ps, hs...) \
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{ \
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.name = n, \
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.reg = r, \
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.pull_shift = ps, \
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.hdrv_shift = hs, \
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}
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struct qcom_tlmm_spec_pin {
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char *name;
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uint32_t reg;
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uint32_t pull_shift;
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uint32_t hdrv_shift;
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};
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struct qcom_tlmm_softc {
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device_t dev;
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device_t busdev;
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struct mtx gpio_mtx;
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struct resource *gpio_mem_res;
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int gpio_mem_rid;
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struct resource *gpio_irq_res;
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int gpio_irq_rid;
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void *gpio_ih;
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int gpio_npins;
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struct gpio_pin *gpio_pins;
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uint32_t sc_debug;
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const struct qcom_tlmm_gpio_mux *gpio_muxes;
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const struct qcom_tlmm_spec_pin *spec_pins;
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};
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/*
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* qcom_tlmm_pinmux.c
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*/
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extern int qcom_tlmm_pinctrl_configure(device_t dev, phandle_t cfgxref);
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#endif /* __QCOM_TLMM_PINMUX_VAR_H__ */
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