mirror of
https://github.com/freebsd/freebsd-src
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9e54973fc3
- Adds mirror interface functionality
- Remove unused virtchnl headers
Signed-off-by: Eric Joyner <erj@FreeBSD.org>
MFC-with: 768329961d
MFC after: 3 days
Sponsored by: Intel Corporation
Tested by: jeffrey.e.pieper@intel.com
Differential Revision: https://reviews.freebsd.org/D44004
355 lines
12 KiB
C
355 lines
12 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/* Copyright (c) 2024, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ICE_FLOW_H_
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#define _ICE_FLOW_H_
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#include "ice_flex_type.h"
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#define ICE_IPV4_MAKE_PREFIX_MASK(prefix) ((u32)(~0) << (32 - (prefix)))
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#define ICE_FLOW_PROF_ID_INVAL 0xfffffffffffffffful
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#define ICE_FLOW_PROF_ID_BYPASS 0
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#define ICE_FLOW_PROF_ID_DEFAULT 1
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#define ICE_FLOW_ENTRY_HANDLE_INVAL 0
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#define ICE_FLOW_VSI_INVAL 0xffff
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#define ICE_FLOW_FLD_OFF_INVAL 0xffff
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/* Generate flow hash field from flow field type(s) */
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#define ICE_FLOW_HASH_IPV4 \
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(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) | \
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BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA))
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#define ICE_FLOW_HASH_IPV6 \
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(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \
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BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA))
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#define ICE_FLOW_HASH_TCP_PORT \
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(BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \
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BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT))
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#define ICE_FLOW_HASH_UDP_PORT \
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(BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT) | \
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BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT))
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#define ICE_FLOW_HASH_SCTP_PORT \
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(BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT) | \
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BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT))
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#define ICE_HASH_INVALID 0
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#define ICE_HASH_TCP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_TCP_PORT)
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#define ICE_HASH_TCP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_TCP_PORT)
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#define ICE_HASH_UDP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_UDP_PORT)
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#define ICE_HASH_UDP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_UDP_PORT)
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#define ICE_HASH_SCTP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_SCTP_PORT)
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#define ICE_HASH_SCTP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_SCTP_PORT)
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/* Protocol header fields within a packet segment. A segment consists of one or
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* more protocol headers that make up a logical group of protocol headers. Each
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* logical group of protocol headers encapsulates or is encapsulated using/by
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* tunneling or encapsulation protocols for network virtualization such as GRE,
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* VxLAN, etc.
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*/
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enum ice_flow_seg_hdr {
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ICE_FLOW_SEG_HDR_NONE = 0x00000000,
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ICE_FLOW_SEG_HDR_ETH = 0x00000001,
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ICE_FLOW_SEG_HDR_VLAN = 0x00000002,
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ICE_FLOW_SEG_HDR_IPV4 = 0x00000004,
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ICE_FLOW_SEG_HDR_IPV6 = 0x00000008,
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ICE_FLOW_SEG_HDR_ARP = 0x00000010,
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ICE_FLOW_SEG_HDR_ICMP = 0x00000020,
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ICE_FLOW_SEG_HDR_TCP = 0x00000040,
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ICE_FLOW_SEG_HDR_UDP = 0x00000080,
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ICE_FLOW_SEG_HDR_SCTP = 0x00000100,
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ICE_FLOW_SEG_HDR_GRE = 0x00000200,
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/* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and
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* ICE_FLOW_SEG_HDR_IPV6.
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*/
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ICE_FLOW_SEG_HDR_IPV_FRAG = 0x40000000,
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ICE_FLOW_SEG_HDR_IPV_OTHER = 0x80000000,
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};
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enum ice_flow_field {
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/* L2 */
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ICE_FLOW_FIELD_IDX_ETH_DA,
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ICE_FLOW_FIELD_IDX_ETH_SA,
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ICE_FLOW_FIELD_IDX_S_VLAN,
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ICE_FLOW_FIELD_IDX_C_VLAN,
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ICE_FLOW_FIELD_IDX_ETH_TYPE,
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/* L3 */
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ICE_FLOW_FIELD_IDX_IPV4_DSCP,
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ICE_FLOW_FIELD_IDX_IPV6_DSCP,
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ICE_FLOW_FIELD_IDX_IPV4_TTL,
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ICE_FLOW_FIELD_IDX_IPV4_PROT,
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ICE_FLOW_FIELD_IDX_IPV6_TTL,
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ICE_FLOW_FIELD_IDX_IPV6_PROT,
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ICE_FLOW_FIELD_IDX_IPV4_SA,
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ICE_FLOW_FIELD_IDX_IPV4_DA,
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ICE_FLOW_FIELD_IDX_IPV6_SA,
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ICE_FLOW_FIELD_IDX_IPV6_DA,
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/* L4 */
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ICE_FLOW_FIELD_IDX_TCP_SRC_PORT,
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ICE_FLOW_FIELD_IDX_TCP_DST_PORT,
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ICE_FLOW_FIELD_IDX_UDP_SRC_PORT,
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ICE_FLOW_FIELD_IDX_UDP_DST_PORT,
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ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT,
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ICE_FLOW_FIELD_IDX_SCTP_DST_PORT,
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ICE_FLOW_FIELD_IDX_TCP_FLAGS,
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/* ARP */
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ICE_FLOW_FIELD_IDX_ARP_SIP,
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ICE_FLOW_FIELD_IDX_ARP_DIP,
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ICE_FLOW_FIELD_IDX_ARP_SHA,
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ICE_FLOW_FIELD_IDX_ARP_DHA,
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ICE_FLOW_FIELD_IDX_ARP_OP,
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/* ICMP */
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ICE_FLOW_FIELD_IDX_ICMP_TYPE,
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ICE_FLOW_FIELD_IDX_ICMP_CODE,
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/* GRE */
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ICE_FLOW_FIELD_IDX_GRE_KEYID,
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/* The total number of enums must not exceed 64 */
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ICE_FLOW_FIELD_IDX_MAX
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};
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/* Flow headers and fields for AVF support */
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enum ice_flow_avf_hdr_field {
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/* Values 0 - 28 are reserved for future use */
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ICE_AVF_FLOW_FIELD_INVALID = 0,
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ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP = 29,
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ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP,
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ICE_AVF_FLOW_FIELD_IPV4_UDP,
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ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK,
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ICE_AVF_FLOW_FIELD_IPV4_TCP,
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ICE_AVF_FLOW_FIELD_IPV4_SCTP,
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ICE_AVF_FLOW_FIELD_IPV4_OTHER,
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ICE_AVF_FLOW_FIELD_FRAG_IPV4,
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/* Values 37-38 are reserved */
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ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP = 39,
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ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP,
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ICE_AVF_FLOW_FIELD_IPV6_UDP,
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ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK,
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ICE_AVF_FLOW_FIELD_IPV6_TCP,
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ICE_AVF_FLOW_FIELD_IPV6_SCTP,
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ICE_AVF_FLOW_FIELD_IPV6_OTHER,
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ICE_AVF_FLOW_FIELD_FRAG_IPV6,
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ICE_AVF_FLOW_FIELD_RSVD47,
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ICE_AVF_FLOW_FIELD_FCOE_OX,
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ICE_AVF_FLOW_FIELD_FCOE_RX,
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ICE_AVF_FLOW_FIELD_FCOE_OTHER,
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/* Values 51-62 are reserved */
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ICE_AVF_FLOW_FIELD_L2_PAYLOAD = 63,
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ICE_AVF_FLOW_FIELD_MAX
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};
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/* Supported RSS offloads This macro is defined to support
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* VIRTCHNL_OP_GET_RSS_HENA_CAPS ops. PF driver sends the RSS hardware
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* capabilities to the caller of this ops.
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*/
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#define ICE_DEFAULT_RSS_HENA ( \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP))
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enum ice_rss_cfg_hdr_type {
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ICE_RSS_OUTER_HEADERS, /* take outer headers as inputset. */
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ICE_RSS_INNER_HEADERS, /* take inner headers as inputset. */
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/* take inner headers as inputset for packet with outer IPv4. */
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ICE_RSS_INNER_HEADERS_W_OUTER_IPV4,
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/* take inner headers as inputset for packet with outer IPv6. */
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ICE_RSS_INNER_HEADERS_W_OUTER_IPV6,
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/* take outer headers first then inner headers as inputset */
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/* take inner as inputset for GTPoGRE with outer IPv4 + GRE. */
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ICE_RSS_INNER_HEADERS_W_OUTER_IPV4_GRE,
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/* take inner as inputset for GTPoGRE with outer IPv6 + GRE. */
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ICE_RSS_INNER_HEADERS_W_OUTER_IPV6_GRE,
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ICE_RSS_ANY_HEADERS
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};
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struct ice_rss_hash_cfg {
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u32 addl_hdrs; /* protocol header fields */
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u64 hash_flds; /* hash bit field (ICE_FLOW_HASH_*) to configure */
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enum ice_rss_cfg_hdr_type hdr_type; /* to specify inner or outer */
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bool symm; /* symmetric or asymmetric hash */
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};
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enum ice_flow_dir {
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ICE_FLOW_DIR_UNDEFINED = 0,
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ICE_FLOW_TX = 0x01,
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ICE_FLOW_RX = 0x02,
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ICE_FLOW_TX_RX = ICE_FLOW_RX | ICE_FLOW_TX
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};
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enum ice_flow_priority {
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ICE_FLOW_PRIO_LOW,
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ICE_FLOW_PRIO_NORMAL,
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ICE_FLOW_PRIO_HIGH
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};
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#define ICE_FLOW_SEG_SINGLE 1
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#define ICE_FLOW_SEG_MAX 2
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#define ICE_FLOW_PROFILE_MAX 1024
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#define ICE_FLOW_ACL_FIELD_VECTOR_MAX 32
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#define ICE_FLOW_FV_EXTRACT_SZ 2
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#define ICE_FLOW_SET_HDRS(seg, val) ((seg)->hdrs |= (u32)(val))
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struct ice_flow_seg_xtrct {
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u8 prot_id; /* Protocol ID of extracted header field */
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u16 off; /* Starting offset of the field in header in bytes */
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u8 idx; /* Index of FV entry used */
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u8 disp; /* Displacement of field in bits fr. FV entry's start */
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};
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enum ice_flow_fld_match_type {
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ICE_FLOW_FLD_TYPE_REG, /* Value, mask */
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ICE_FLOW_FLD_TYPE_RANGE, /* Value, mask, last (upper bound) */
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ICE_FLOW_FLD_TYPE_PREFIX, /* IP address, prefix, size of prefix */
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ICE_FLOW_FLD_TYPE_SIZE, /* Value, mask, size of match */
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};
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struct ice_flow_fld_loc {
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/* Describe offsets of field information relative to the beginning of
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* input buffer provided when adding flow entries.
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*/
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u16 val; /* Offset where the value is located */
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u16 mask; /* Offset where the mask/prefix value is located */
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u16 last; /* Length or offset where the upper value is located */
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};
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struct ice_flow_fld_info {
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enum ice_flow_fld_match_type type;
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/* Location where to retrieve data from an input buffer */
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struct ice_flow_fld_loc src;
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/* Location where to put the data into the final entry buffer */
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struct ice_flow_fld_loc entry;
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struct ice_flow_seg_xtrct xtrct;
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};
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struct ice_flow_seg_info {
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u32 hdrs; /* Bitmask indicating protocol headers present */
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/* Bitmask indicating header fields to be matched */
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ice_declare_bitmap(match, ICE_FLOW_FIELD_IDX_MAX);
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/* Bitmask indicating header fields matched as ranges */
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ice_declare_bitmap(range, ICE_FLOW_FIELD_IDX_MAX);
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struct ice_flow_fld_info fields[ICE_FLOW_FIELD_IDX_MAX];
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};
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#define ICE_FLOW_ENTRY_HNDL(e) ((u64)e)
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struct ice_flow_prof {
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struct LIST_ENTRY_TYPE l_entry;
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u64 id;
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enum ice_flow_dir dir;
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u8 segs_cnt;
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struct ice_flow_seg_info segs[ICE_FLOW_SEG_MAX];
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/* software VSI handles referenced by this flow profile */
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ice_declare_bitmap(vsis, ICE_MAX_VSI);
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union {
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/* struct sw_recipe */
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bool symm; /* Symmetric Hash for RSS */
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} cfg;
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};
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struct ice_rss_cfg {
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struct LIST_ENTRY_TYPE l_entry;
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/* bitmap of VSIs added to the RSS entry */
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ice_declare_bitmap(vsis, ICE_MAX_VSI);
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struct ice_rss_hash_cfg hash;
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};
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enum ice_flow_action_type {
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ICE_FLOW_ACT_NOP,
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ICE_FLOW_ACT_ALLOW,
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ICE_FLOW_ACT_DROP,
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ICE_FLOW_ACT_CNTR_PKT,
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ICE_FLOW_ACT_FWD_VSI,
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ICE_FLOW_ACT_FWD_VSI_LIST, /* Should be abstracted away */
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ICE_FLOW_ACT_FWD_QUEUE, /* Can Queues be abstracted away? */
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ICE_FLOW_ACT_FWD_QUEUE_GROUP, /* Can Queues be abstracted away? */
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ICE_FLOW_ACT_PUSH,
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ICE_FLOW_ACT_POP,
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ICE_FLOW_ACT_MODIFY,
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ICE_FLOW_ACT_CNTR_BYTES,
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ICE_FLOW_ACT_CNTR_PKT_BYTES,
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ICE_FLOW_ACT_GENERIC_0,
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ICE_FLOW_ACT_GENERIC_1,
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ICE_FLOW_ACT_GENERIC_2,
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ICE_FLOW_ACT_GENERIC_3,
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ICE_FLOW_ACT_GENERIC_4,
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ICE_FLOW_ACT_RPT_FLOW_ID,
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ICE_FLOW_ACT_BUILD_PROF_IDX,
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};
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struct ice_flow_action {
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enum ice_flow_action_type type;
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union {
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u32 dummy;
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} data;
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};
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u64
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ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
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struct ice_flow_seg_info *segs, u8 segs_cnt);
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enum ice_status
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ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,
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u16 vsig);
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enum ice_status
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ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
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u8 *hw_prof);
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void
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ice_flow_set_fld_prefix(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
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u16 val_loc, u16 prefix_loc, u8 prefix_sz);
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void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle);
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enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
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enum ice_status
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ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds);
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enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
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enum ice_status
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ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
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const struct ice_rss_hash_cfg *cfg);
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enum ice_status
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ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
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const struct ice_rss_hash_cfg *cfg);
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u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs);
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#endif /* _ICE_FLOW_H_ */
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