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DPAA2 is a hardware-level networking architecture found in some NXP SoCs which contain hardware blocks including Management Complex (MC, a command interface to manipulate DPAA2 objects), Wire Rate I/O processor (WRIOP, packets distribution, queuing, drop decisions), Queues and Buffers Manager (QBMan, Rx/Tx queues control, Rx buffer pools) and the others. The Management Complex runs NXP-supplied firmware which provides DPAA2 objects as an abstraction layer over those blocks to simplify an access to the underlying hardware. Each DPAA2 object has its own driver (to perform an initialization at least) and will be visible as a separate device in the device tree. Two new drivers (dpaa2_mc and dpaa2_rc) act like firmware buses in order to form a hierarchy of the DPAA2 devices: acpiX (or simplebusX) dpaa2_mcX dpaa2_rcX dpaa2_mcp0 ... dpaa2_mcpN dpaa2_bpX dpaa2_macX dpaa2_io0 ... dpaa2_ioM dpaa2_niX dpaa2_mc is suppossed to be a root of the hierarchy, comes in ACPI and FDT flavours and implements helper interfaces to allocate and assign bus resources, MSI and "managed" DPAA2 devices (NXP treats some of the objects as resources for the other DPAA2 objects to let them function properly). Almost all of the DPAA2 objects are assigned to the resource containers (dpaa2_rc) to implement isolation. The initial implementation focuses on the DPAA2 network interface to be operational. It is the most complex object in terms of dependencies which uses I/O objects to transmit/receive packets. Approved by: bz (mentor) Tested by: manu, bz MFC after: 3 months Differential Revision: https://reviews.freebsd.org/D36638
97 lines
3 KiB
Objective-C
97 lines
3 KiB
Objective-C
#-
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# SPDX-License-Identifier: BSD-2-Clause
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#
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# Copyright © 2021-2022 Dmitry Salychev
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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# SUCH DAMAGE.
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#
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#include <machine/bus.h>
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#include <dev/dpaa2/dpaa2_mc.h>
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#include <dev/dpaa2/dpaa2_swp.h>
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#include <dev/dpaa2/dpaa2_bp.h>
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/**
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* @brief QBMan software portal interface.
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*
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* Software portals are used by data path software executing on a processor core
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* to communicate with the Queue Manager (QMan) which acts as a central resource
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* in DPAA2, managing the queueing of data between multiple processor cores,
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* network interfaces, and hardware accelerators in a multicore SoC.
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*/
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INTERFACE dpaa2_swp;
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/**
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* @brief Enqueue multiple frames to a frame queue using one Frame Queue ID.
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*
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* dev: DPIO device.
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* fqid: Frame Queue ID.
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* fd: Frame descriptor to enqueue.
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* frames_n: Number of frames to enqueue.
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*/
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METHOD int enq_multiple_fq {
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device_t dev;
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uint32_t fqid;
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struct dpaa2_fd *fd;
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int frames_n;
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}
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/**
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* @brief Configure the channel data availability notification (CDAN)
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* in a particular WQ channel paired with DPIO.
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*
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* dev: DPIO device.
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* ctx: Context to configure data availability notifications (CDAN).
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*/
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METHOD int conf_wq_channel {
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device_t dev;
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struct dpaa2_io_notif_ctx *ctx;
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};
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/**
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* @brief Release one or more buffer pointers to a QBMan buffer pool.
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*
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* dev: DPIO device.
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* bpid: Buffer pool ID.
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* buf: Array of buffers physical addresses.
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* buf_num: Number of the buffers in the array.
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*/
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METHOD int release_bufs {
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device_t dev;
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uint16_t bpid;
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bus_addr_t *buf;
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uint32_t buf_num;
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};
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/**
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* @brief Query current configuration/state of the buffer pool.
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*
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* dev: DPIO device.
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* bpid: Buffer pool ID.
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* conf: Configuration/state of the buffer pool.
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*/
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METHOD int query_bp {
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device_t dev;
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uint16_t bpid;
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struct dpaa2_bp_conf *conf;
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}
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