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262 lines
6.7 KiB
C
262 lines
6.7 KiB
C
/*-
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* Copyright (c) 2017-2020 Conrad Meyer <cem@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Driver for the AMD Family 15h and 17h CPU System Management Network.
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*/
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/lock.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/sysctl.h>
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#include <sys/systm.h>
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#include <machine/cpufunc.h>
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#include <machine/cputypes.h>
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#include <machine/md_var.h>
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#include <machine/specialreg.h>
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#include <dev/pci/pcivar.h>
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#include <x86/pci_cfgreg.h>
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#include <dev/amdsmn/amdsmn.h>
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#define F15H_SMN_ADDR_REG 0xb8
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#define F15H_SMN_DATA_REG 0xbc
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#define F17H_SMN_ADDR_REG 0x60
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#define F17H_SMN_DATA_REG 0x64
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#define PCI_DEVICE_ID_AMD_15H_M60H_ROOT 0x1576
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#define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450
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#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
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#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */
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#define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
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#define PCI_DEVICE_ID_AMD_19H_M10H_ROOT 0x14a4
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#define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
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struct pciid;
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struct amdsmn_softc {
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struct mtx smn_lock;
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const struct pciid *smn_pciid;
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};
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static const struct pciid {
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uint16_t amdsmn_vendorid;
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uint16_t amdsmn_deviceid;
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uint8_t amdsmn_addr_reg;
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uint8_t amdsmn_data_reg;
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} amdsmn_ids[] = {
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{
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.amdsmn_vendorid = CPU_VENDOR_AMD,
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.amdsmn_deviceid = PCI_DEVICE_ID_AMD_15H_M60H_ROOT,
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.amdsmn_addr_reg = F15H_SMN_ADDR_REG,
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.amdsmn_data_reg = F15H_SMN_DATA_REG,
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},
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{
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.amdsmn_vendorid = CPU_VENDOR_AMD,
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.amdsmn_deviceid = PCI_DEVICE_ID_AMD_17H_ROOT,
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.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
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.amdsmn_data_reg = F17H_SMN_DATA_REG,
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},
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{
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.amdsmn_vendorid = CPU_VENDOR_AMD,
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.amdsmn_deviceid = PCI_DEVICE_ID_AMD_17H_M10H_ROOT,
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.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
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.amdsmn_data_reg = F17H_SMN_DATA_REG,
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},
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{
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.amdsmn_vendorid = CPU_VENDOR_AMD,
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.amdsmn_deviceid = PCI_DEVICE_ID_AMD_17H_M30H_ROOT,
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.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
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.amdsmn_data_reg = F17H_SMN_DATA_REG,
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},
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{
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.amdsmn_vendorid = CPU_VENDOR_AMD,
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.amdsmn_deviceid = PCI_DEVICE_ID_AMD_17H_M60H_ROOT,
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.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
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.amdsmn_data_reg = F17H_SMN_DATA_REG,
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},
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{
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.amdsmn_vendorid = CPU_VENDOR_AMD,
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.amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M10H_ROOT,
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.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
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.amdsmn_data_reg = F17H_SMN_DATA_REG,
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},
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{
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.amdsmn_vendorid = CPU_VENDOR_AMD,
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.amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M60H_ROOT,
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.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
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.amdsmn_data_reg = F17H_SMN_DATA_REG,
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},
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};
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/*
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* Device methods.
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*/
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static void amdsmn_identify(driver_t *driver, device_t parent);
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static int amdsmn_probe(device_t dev);
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static int amdsmn_attach(device_t dev);
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static int amdsmn_detach(device_t dev);
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static device_method_t amdsmn_methods[] = {
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/* Device interface */
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DEVMETHOD(device_identify, amdsmn_identify),
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DEVMETHOD(device_probe, amdsmn_probe),
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DEVMETHOD(device_attach, amdsmn_attach),
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DEVMETHOD(device_detach, amdsmn_detach),
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DEVMETHOD_END
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};
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static driver_t amdsmn_driver = {
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"amdsmn",
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amdsmn_methods,
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sizeof(struct amdsmn_softc),
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};
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DRIVER_MODULE(amdsmn, hostb, amdsmn_driver, NULL, NULL);
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MODULE_VERSION(amdsmn, 1);
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MODULE_PNP_INFO("U16:vendor;U16:device", pci, amdsmn, amdsmn_ids,
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nitems(amdsmn_ids));
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static bool
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amdsmn_match(device_t parent, const struct pciid **pciid_out)
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{
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uint16_t vendor, device;
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size_t i;
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vendor = pci_get_vendor(parent);
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device = pci_get_device(parent);
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for (i = 0; i < nitems(amdsmn_ids); i++) {
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if (vendor == amdsmn_ids[i].amdsmn_vendorid &&
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device == amdsmn_ids[i].amdsmn_deviceid) {
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if (pciid_out != NULL)
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*pciid_out = &amdsmn_ids[i];
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return (true);
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}
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}
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return (false);
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}
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static void
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amdsmn_identify(driver_t *driver, device_t parent)
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{
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device_t child;
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/* Make sure we're not being doubly invoked. */
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if (device_find_child(parent, "amdsmn", -1) != NULL)
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return;
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if (!amdsmn_match(parent, NULL))
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return;
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child = device_add_child(parent, "amdsmn", -1);
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if (child == NULL)
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device_printf(parent, "add amdsmn child failed\n");
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}
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static int
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amdsmn_probe(device_t dev)
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{
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uint32_t family;
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if (resource_disabled("amdsmn", 0))
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return (ENXIO);
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if (!amdsmn_match(device_get_parent(dev), NULL))
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return (ENXIO);
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family = CPUID_TO_FAMILY(cpu_id);
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switch (family) {
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case 0x15:
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case 0x17:
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case 0x19:
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break;
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default:
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return (ENXIO);
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}
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device_set_descf(dev, "AMD Family %xh System Management Network",
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family);
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return (BUS_PROBE_GENERIC);
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}
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static int
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amdsmn_attach(device_t dev)
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{
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struct amdsmn_softc *sc = device_get_softc(dev);
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if (!amdsmn_match(device_get_parent(dev), &sc->smn_pciid))
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return (ENXIO);
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mtx_init(&sc->smn_lock, "SMN mtx", "SMN", MTX_DEF);
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return (0);
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}
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int
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amdsmn_detach(device_t dev)
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{
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struct amdsmn_softc *sc = device_get_softc(dev);
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mtx_destroy(&sc->smn_lock);
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return (0);
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}
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int
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amdsmn_read(device_t dev, uint32_t addr, uint32_t *value)
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{
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struct amdsmn_softc *sc = device_get_softc(dev);
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device_t parent;
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parent = device_get_parent(dev);
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mtx_lock(&sc->smn_lock);
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pci_write_config(parent, sc->smn_pciid->amdsmn_addr_reg, addr, 4);
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*value = pci_read_config(parent, sc->smn_pciid->amdsmn_data_reg, 4);
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mtx_unlock(&sc->smn_lock);
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return (0);
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}
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int
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amdsmn_write(device_t dev, uint32_t addr, uint32_t value)
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{
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struct amdsmn_softc *sc = device_get_softc(dev);
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device_t parent;
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parent = device_get_parent(dev);
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mtx_lock(&sc->smn_lock);
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pci_write_config(parent, sc->smn_pciid->amdsmn_addr_reg, addr, 4);
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pci_write_config(parent, sc->smn_pciid->amdsmn_data_reg, value, 4);
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mtx_unlock(&sc->smn_lock);
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return (0);
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}
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