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49b49cda41
Files required for the NIC driver Import from vendor-sys/alpine-hal/2.7 SVN rev.: 294828 HAL version: 2.7 Obtained from: Semihalf Sponsored by: Annapurna Labs
105 lines
3.6 KiB
C
105 lines
3.6 KiB
C
/*-
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*******************************************************************************
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Copyright (C) 2015 Annapurna Labs Ltd.
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This file may be licensed under the terms of the Annapurna Labs Commercial
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License Agreement.
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Alternatively, this file can be distributed under the terms of the GNU General
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Public License V2 as published by the Free Software Foundation and can be
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found at http://www.gnu.org/licenses/gpl-2.0.html
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Alternatively, redistribution and use in source and binary forms, with or
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without modification, are permitted provided that the following conditions are
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met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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/**
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* @{
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* @file al_hal_udma_regs.h
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*
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* @brief udma registers definition
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*
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*
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*/
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#ifndef __AL_HAL_UDMA_REG_H
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#define __AL_HAL_UDMA_REG_H
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#include "al_hal_udma_regs_m2s.h"
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#include "al_hal_udma_regs_s2m.h"
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#include "al_hal_udma_regs_gen.h"
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#define AL_UDMA_REV_ID_REV0 0
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#define AL_UDMA_REV_ID_REV1 1
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#define AL_UDMA_REV_ID_REV2 2
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** UDMA registers, either m2s or s2m */
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union udma_regs {
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struct udma_m2s_regs m2s;
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struct udma_s2m_regs s2m;
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};
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struct unit_regs {
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struct udma_m2s_regs m2s;
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uint32_t rsrvd0[(0x10000 - sizeof(struct udma_m2s_regs)) >> 2];
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struct udma_s2m_regs s2m;
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uint32_t rsrvd1[((0x1C000 - 0x10000) - sizeof(struct udma_s2m_regs)) >> 2];
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struct udma_gen_regs gen;
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};
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/** UDMA submission and completion registers, M2S and S2M UDMAs have same stucture */
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struct udma_rings_regs {
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uint32_t rsrvd0[8];
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uint32_t cfg; /* Descriptor ring configuration */
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uint32_t status; /* Descriptor ring status and information */
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uint32_t drbp_low; /* Descriptor Ring Base Pointer [31:4] */
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uint32_t drbp_high; /* Descriptor Ring Base Pointer [63:32] */
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uint32_t drl; /* Descriptor Ring Length[23:2] */
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uint32_t drhp; /* Descriptor Ring Head Pointer */
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uint32_t drtp_inc; /* Descriptor Tail Pointer increment */
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uint32_t drtp; /* Descriptor Tail Pointer */
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uint32_t dcp; /* Descriptor Current Pointer */
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uint32_t crbp_low; /* Completion Ring Base Pointer [31:4] */
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uint32_t crbp_high; /* Completion Ring Base Pointer [63:32] */
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uint32_t crhp; /* Completion Ring Head Pointer */
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uint32_t crhp_internal; /* Completion Ring Head Pointer internal, before AX ... */
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};
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/** M2S and S2M generic structure of Q registers */
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union udma_q_regs {
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struct udma_rings_regs rings;
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struct udma_m2s_q m2s_q;
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struct udma_s2m_q s2m_q;
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* __AL_HAL_UDMA_REG_H */
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/** @} end of UDMA group */
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