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47e073941f
To support virtual machines on arm64 add the vmm code. This is based on earlier work by Mihai Carabas and Alexandru Elisei at University Politehnica of Bucharest, with further work by myself and Mark Johnston. All AArch64 CPUs should work, however only the GICv3 interrupt controller is supported. There is initial support to allow the GICv2 to be supported in the future. Only pure Armv8.0 virtualisation is supported, the Virtualization Host Extensions are not currently used. With a separate userspace patch and U-Boot port FreeBSD guests are able to boot to multiuser mode, and the hypervisor can be tested with the kvm unit tests. Linux partially boots, but hangs before entering userspace. Other operating systems are untested. Sponsored by: Arm Ltd Sponsored by: Innovate UK Sponsored by: The FreeBSD Foundation Sponsored by: University Politehnica of Bucharest Differential Revision: https://reviews.freebsd.org/D37428
115 lines
4.4 KiB
C
115 lines
4.4 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (C) 2017 Alexandru Elisei <alexandru.elisei@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _VMM_HYP_H_
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#define _VMM_HYP_H_
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/*
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* The translation tables for the hypervisor mode will hold mappings for kernel
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* virtual addresses and an identity mapping (VA == PA) necessary when
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* enabling/disabling the MMU.
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*
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* When in EL2 exception level the translation table base register is TTBR0_EL2
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* and the virtual addresses generated by the CPU must be at the bottom of the
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* memory, with the first 16 bits all set to zero:
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*
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* 0x0000ffffffffffff End hyp address space
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* 0x0000000000000000 Start of hyp address space
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*
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* To run code in hyp mode we need to convert kernel virtual addresses to
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* addreses that fit into this address space.
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*
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* The kernel virtual address range is:
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*
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* 0xffff007fffffffff End of KVA
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* 0xffff000000000000 Kernel base address & start of KVA
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*
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* (see /sys/arm64/include/vmparam.h).
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*
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* We could convert the kernel virtual addresses to valid EL2 addresses by
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* setting the first 16 bits to zero and thus mapping the kernel addresses in
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* the bottom half of the EL2 address space, but then they might clash with the
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* identity mapping addresses. Instead we map the kernel addresses in the upper
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* half of the EL2 address space.
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*
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* The hypervisor address space will look like this:
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*
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* 0x0000807fffffffff End of KVA mapping
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* 0x0000800000000000 Start of KVA mapping
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*
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* 0x00007fffffffffff End of identity mapping
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* 0x0000000000000000 Start of identity mapping
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*
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* With the scheme we have 47 bits at our disposable for the identity map and
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* another 47 bits for the kernel virtual addresses. For a maximum physical
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* memory size of 128TB we are guaranteed to not have any clashes between
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* addresses.
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*/
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#define HYP_VM_MIN_ADDRESS 0x0000000000000000
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#define HYP_VM_MAX_ADDRESS 0x0001000000000000
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/*
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* When the vmm code is installed the following handles can be used by
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* the host to call into EL2.
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*/
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#define HYP_CLEANUP 0x00000001
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#define HYP_ENTER_GUEST 0x00000002
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#define HYP_READ_REGISTER 0x00000003
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#define HYP_REG_ICH_VTR 0x1
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#define HYP_REG_CNTHCTL 0x2
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#define HYP_CLEAN_S2_TLBI 0x00000004
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#define HYP_DC_CIVAC 0x00000005
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#define HYP_EL2_TLBI 0x00000006
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#define HYP_EL2_TLBI_ALL 0x1
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#define HYP_EL2_TLBI_VA 0x2
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#define HYP_S2_TLBI_RANGE 0x00000010
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#define HYP_S2_TLBI_ALL 0x00000011
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/*
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* When taking asynchronous exceptions, or interrupts, with the exception of the
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* SError interrupt, the exception syndrome register is not updated with the
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* exception code. We need to differentiate between the different exception
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* types taken to EL2.
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*/
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#define EXCP_TYPE_EL1_SYNC 0
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#define EXCP_TYPE_EL1_IRQ 1
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#define EXCP_TYPE_EL1_FIQ 2
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#define EXCP_TYPE_EL1_ERROR 3
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#define EXCP_TYPE_EL2_SYNC 4
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#define EXCP_TYPE_EL2_IRQ 5
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#define EXCP_TYPE_EL2_FIQ 6
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#define EXCP_TYPE_EL2_ERROR 7
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#define EXCP_TYPE_MAINT_IRQ 8
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/* Used internally in vmm_hyp.c */
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#define EXCP_TYPE_REENTER 9
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#define HYP_GET_VECTOR_TABLE -1
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#endif /* !_VMM_HYP_H_ */
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