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528 lines
20 KiB
C
528 lines
20 KiB
C
/* $NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* From: sys/arm/include/bus.h
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*/
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#ifdef __arm__
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#include <arm/bus.h>
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#else /* !__arm__ */
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#ifndef _MACHINE_BUS_H_
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#define _MACHINE_BUS_H_
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#include <machine/_bus.h>
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#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
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#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFFUL
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#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFFUL
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#define BUS_SPACE_MAXADDR_40BIT 0xFFFFFFFFFFUL
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#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFFUL
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#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFFUL
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#define BUS_SPACE_MAXSIZE_40BIT 0xFFFFFFFFFFUL
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#define BUS_SPACE_MAXADDR 0xFFFFFFFFFFFFFFFFUL
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#define BUS_SPACE_MAXSIZE 0xFFFFFFFFFFFFFFFFUL
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#define BUS_SPACE_MAP_CACHEABLE 0x01
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#define BUS_SPACE_MAP_LINEAR 0x02
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#define BUS_SPACE_MAP_PREFETCHABLE 0x04
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#define BUS_SPACE_MAP_NONPOSTED 0x08
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#define BUS_SPACE_UNRESTRICTED (~0)
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#define BUS_SPACE_BARRIER_READ 0x01
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#define BUS_SPACE_BARRIER_WRITE 0x02
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struct bus_space {
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/* cookie */
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void *bs_cookie;
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/* mapping/unmapping */
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int (*bs_map) (void *, bus_addr_t, bus_size_t,
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int, bus_space_handle_t *);
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void (*bs_unmap) (void *, bus_space_handle_t, bus_size_t);
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int (*bs_subregion) (void *, bus_space_handle_t,
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bus_size_t, bus_size_t, bus_space_handle_t *);
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/* allocation/deallocation */
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int (*bs_alloc) (void *, bus_addr_t, bus_addr_t,
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bus_size_t, bus_size_t, bus_size_t, int,
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bus_addr_t *, bus_space_handle_t *);
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void (*bs_free) (void *, bus_space_handle_t,
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bus_size_t);
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/* get kernel virtual address */
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/* barrier */
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void (*bs_barrier) (void *, bus_space_handle_t,
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bus_size_t, bus_size_t, int);
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/* read single */
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u_int8_t (*bs_r_1) (void *, bus_space_handle_t, bus_size_t);
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u_int16_t (*bs_r_2) (void *, bus_space_handle_t, bus_size_t);
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u_int32_t (*bs_r_4) (void *, bus_space_handle_t, bus_size_t);
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u_int64_t (*bs_r_8) (void *, bus_space_handle_t, bus_size_t);
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/* read multiple */
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void (*bs_rm_1) (void *, bus_space_handle_t, bus_size_t,
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u_int8_t *, bus_size_t);
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void (*bs_rm_2) (void *, bus_space_handle_t, bus_size_t,
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u_int16_t *, bus_size_t);
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void (*bs_rm_4) (void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t);
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void (*bs_rm_8) (void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t);
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/* read region */
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void (*bs_rr_1) (void *, bus_space_handle_t,
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bus_size_t, u_int8_t *, bus_size_t);
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void (*bs_rr_2) (void *, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t);
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void (*bs_rr_4) (void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t);
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void (*bs_rr_8) (void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t);
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/* write single */
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void (*bs_w_1) (void *, bus_space_handle_t,
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bus_size_t, u_int8_t);
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void (*bs_w_2) (void *, bus_space_handle_t,
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bus_size_t, u_int16_t);
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void (*bs_w_4) (void *, bus_space_handle_t,
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bus_size_t, u_int32_t);
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void (*bs_w_8) (void *, bus_space_handle_t,
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bus_size_t, u_int64_t);
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/* write multiple */
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void (*bs_wm_1) (void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t);
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void (*bs_wm_2) (void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t);
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void (*bs_wm_4) (void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t);
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void (*bs_wm_8) (void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t);
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/* write region */
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void (*bs_wr_1) (void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t);
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void (*bs_wr_2) (void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t);
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void (*bs_wr_4) (void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t);
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void (*bs_wr_8) (void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t);
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/* set multiple */
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void (*bs_sm_1) (void *, bus_space_handle_t,
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bus_size_t, u_int8_t, bus_size_t);
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void (*bs_sm_2) (void *, bus_space_handle_t,
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bus_size_t, u_int16_t, bus_size_t);
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void (*bs_sm_4) (void *, bus_space_handle_t,
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bus_size_t, u_int32_t, bus_size_t);
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void (*bs_sm_8) (void *, bus_space_handle_t,
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bus_size_t, u_int64_t, bus_size_t);
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/* set region */
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void (*bs_sr_1) (void *, bus_space_handle_t,
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bus_size_t, u_int8_t, bus_size_t);
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void (*bs_sr_2) (void *, bus_space_handle_t,
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bus_size_t, u_int16_t, bus_size_t);
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void (*bs_sr_4) (void *, bus_space_handle_t,
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bus_size_t, u_int32_t, bus_size_t);
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void (*bs_sr_8) (void *, bus_space_handle_t,
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bus_size_t, u_int64_t, bus_size_t);
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/* copy */
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void (*bs_c_1) (void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void (*bs_c_2) (void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void (*bs_c_4) (void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void (*bs_c_8) (void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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/* read single stream */
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u_int8_t (*bs_r_1_s) (void *, bus_space_handle_t, bus_size_t);
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u_int16_t (*bs_r_2_s) (void *, bus_space_handle_t, bus_size_t);
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u_int32_t (*bs_r_4_s) (void *, bus_space_handle_t, bus_size_t);
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u_int64_t (*bs_r_8_s) (void *, bus_space_handle_t, bus_size_t);
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/* read multiple stream */
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void (*bs_rm_1_s) (void *, bus_space_handle_t, bus_size_t,
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u_int8_t *, bus_size_t);
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void (*bs_rm_2_s) (void *, bus_space_handle_t, bus_size_t,
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u_int16_t *, bus_size_t);
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void (*bs_rm_4_s) (void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t);
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void (*bs_rm_8_s) (void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t);
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/* read region stream */
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void (*bs_rr_1_s) (void *, bus_space_handle_t,
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bus_size_t, u_int8_t *, bus_size_t);
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void (*bs_rr_2_s) (void *, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t);
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void (*bs_rr_4_s) (void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t);
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void (*bs_rr_8_s) (void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t);
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/* write single stream */
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void (*bs_w_1_s) (void *, bus_space_handle_t,
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bus_size_t, u_int8_t);
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void (*bs_w_2_s) (void *, bus_space_handle_t,
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bus_size_t, u_int16_t);
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void (*bs_w_4_s) (void *, bus_space_handle_t,
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bus_size_t, u_int32_t);
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void (*bs_w_8_s) (void *, bus_space_handle_t,
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bus_size_t, u_int64_t);
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/* write multiple stream */
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void (*bs_wm_1_s) (void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t);
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void (*bs_wm_2_s) (void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t);
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void (*bs_wm_4_s) (void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t);
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void (*bs_wm_8_s) (void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t);
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/* write region stream */
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void (*bs_wr_1_s) (void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t);
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void (*bs_wr_2_s) (void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t);
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void (*bs_wr_4_s) (void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t);
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void (*bs_wr_8_s) (void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t);
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/* peek */
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int (*bs_peek_1)(void *, bus_space_handle_t,
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bus_size_t , uint8_t *);
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int (*bs_peek_2)(void *, bus_space_handle_t,
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bus_size_t , uint16_t *);
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int (*bs_peek_4)(void *, bus_space_handle_t,
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bus_size_t , uint32_t *);
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int (*bs_peek_8)(void *, bus_space_handle_t,
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bus_size_t , uint64_t *);
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/* poke */
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int (*bs_poke_1)(void *, bus_space_handle_t,
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bus_size_t, uint8_t);
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int (*bs_poke_2)(void *, bus_space_handle_t,
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bus_size_t, uint16_t);
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int (*bs_poke_4)(void *, bus_space_handle_t,
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bus_size_t, uint32_t);
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int (*bs_poke_8)(void *, bus_space_handle_t,
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bus_size_t, uint64_t);
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};
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#if defined(SAN_NEEDS_INTERCEPTORS) && !defined(SAN_RUNTIME)
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#include <sys/bus_san.h>
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#else
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/*
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* Utility macros; INTERNAL USE ONLY.
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*/
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#define __bs_c(a,b) __CONCAT(a,b)
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#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
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#define __bs_rs(sz, t, h, o) \
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(*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o)
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#define __bs_ws(sz, t, h, o, v) \
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(*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v)
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#define __bs_nonsingle(type, sz, t, h, o, a, c) \
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(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c)
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#define __bs_set(type, sz, t, h, o, v, c) \
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(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c)
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#define __bs_copy(sz, t, h1, o1, h2, o2, cnt) \
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(*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)
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#define __bs_opname_s(op,size) __bs_c(__bs_c(__bs_c(__bs_c(bs_,op),_),size),_s)
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#define __bs_rs_s(sz, t, h, o) \
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(*(t)->__bs_opname_s(r,sz))((t)->bs_cookie, h, o)
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#define __bs_ws_s(sz, t, h, o, v) \
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(*(t)->__bs_opname_s(w,sz))((t)->bs_cookie, h, o, v)
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#define __bs_peek(sz, t, h, o, vp) \
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(*(t)->__bs_opname(peek, sz))((t)->bs_cookie, h, o, vp)
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#define __bs_poke(sz, t, h, o, v) \
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(*(t)->__bs_opname(poke, sz))((t)->bs_cookie, h, o, v)
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#define __bs_nonsingle_s(type, sz, t, h, o, a, c) \
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(*(t)->__bs_opname_s(type,sz))((t)->bs_cookie, h, o, a, c)
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/*
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* Mapping and unmapping operations.
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*/
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#define bus_space_map(t, a, s, c, hp) \
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(*(t)->bs_map)((t)->bs_cookie, (a), (s), (c), (hp))
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#define bus_space_unmap(t, h, s) \
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(*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
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#define bus_space_subregion(t, h, o, s, hp) \
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(*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
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/*
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* Allocation and deallocation operations.
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*/
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#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp) \
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(*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \
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(c), (ap), (hp))
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#define bus_space_free(t, h, s) \
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(*(t)->bs_free)((t)->bs_cookie, (h), (s))
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/*
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* Bus barrier operations.
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*/
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#define bus_space_barrier(t, h, o, l, f) \
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(*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f))
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/*
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* Bus read (single) operations.
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*/
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#define bus_space_read_1(t, h, o) __bs_rs(1,(t),(h),(o))
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#define bus_space_read_2(t, h, o) __bs_rs(2,(t),(h),(o))
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#define bus_space_read_4(t, h, o) __bs_rs(4,(t),(h),(o))
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#define bus_space_read_8(t, h, o) __bs_rs(8,(t),(h),(o))
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#define bus_space_read_stream_1(t, h, o) __bs_rs_s(1,(t), (h), (o))
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#define bus_space_read_stream_2(t, h, o) __bs_rs_s(2,(t), (h), (o))
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#define bus_space_read_stream_4(t, h, o) __bs_rs_s(4,(t), (h), (o))
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#define bus_space_read_stream_8(t, h, o) __bs_rs_s(8,(t), (h), (o))
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/*
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* Bus read multiple operations.
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*/
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#define bus_space_read_multi_1(t, h, o, a, c) \
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__bs_nonsingle(rm,1,(t),(h),(o),(a),(c))
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#define bus_space_read_multi_2(t, h, o, a, c) \
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__bs_nonsingle(rm,2,(t),(h),(o),(a),(c))
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#define bus_space_read_multi_4(t, h, o, a, c) \
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__bs_nonsingle(rm,4,(t),(h),(o),(a),(c))
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#define bus_space_read_multi_8(t, h, o, a, c) \
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__bs_nonsingle(rm,8,(t),(h),(o),(a),(c))
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#define bus_space_read_multi_stream_1(t, h, o, a, c) \
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__bs_nonsingle_s(rm,1,(t),(h),(o),(a),(c))
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|
#define bus_space_read_multi_stream_2(t, h, o, a, c) \
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__bs_nonsingle_s(rm,2,(t),(h),(o),(a),(c))
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|
#define bus_space_read_multi_stream_4(t, h, o, a, c) \
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__bs_nonsingle_s(rm,4,(t),(h),(o),(a),(c))
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|
#define bus_space_read_multi_stream_8(t, h, o, a, c) \
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__bs_nonsingle_s(rm,8,(t),(h),(o),(a),(c))
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|
|
|
/*
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|
* Bus read region operations.
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|
*/
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|
#define bus_space_read_region_1(t, h, o, a, c) \
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__bs_nonsingle(rr,1,(t),(h),(o),(a),(c))
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|
#define bus_space_read_region_2(t, h, o, a, c) \
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__bs_nonsingle(rr,2,(t),(h),(o),(a),(c))
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|
#define bus_space_read_region_4(t, h, o, a, c) \
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__bs_nonsingle(rr,4,(t),(h),(o),(a),(c))
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#define bus_space_read_region_8(t, h, o, a, c) \
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__bs_nonsingle(rr,8,(t),(h),(o),(a),(c))
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|
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#define bus_space_read_region_stream_1(t, h, o, a, c) \
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__bs_nonsingle_s(rr,1,(t),(h),(o),(a),(c))
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|
#define bus_space_read_region_stream_2(t, h, o, a, c) \
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__bs_nonsingle_s(rr,2,(t),(h),(o),(a),(c))
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|
#define bus_space_read_region_stream_4(t, h, o, a, c) \
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__bs_nonsingle_s(rr,4,(t),(h),(o),(a),(c))
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#define bus_space_read_region_stream_8(t, h, o, a, c) \
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__bs_nonsingle_s(rr,8,(t),(h),(o),(a),(c))
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|
|
|
/*
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|
* Bus write (single) operations.
|
|
*/
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|
#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v))
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|
#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v))
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|
#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v))
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|
#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v))
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|
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|
#define bus_space_write_stream_1(t, h, o, v) __bs_ws_s(1,(t),(h),(o),(v))
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|
#define bus_space_write_stream_2(t, h, o, v) __bs_ws_s(2,(t),(h),(o),(v))
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|
#define bus_space_write_stream_4(t, h, o, v) __bs_ws_s(4,(t),(h),(o),(v))
|
|
#define bus_space_write_stream_8(t, h, o, v) __bs_ws_s(8,(t),(h),(o),(v))
|
|
|
|
/*
|
|
* Bus write multiple operations.
|
|
*/
|
|
#define bus_space_write_multi_1(t, h, o, a, c) \
|
|
__bs_nonsingle(wm,1,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_multi_2(t, h, o, a, c) \
|
|
__bs_nonsingle(wm,2,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_multi_4(t, h, o, a, c) \
|
|
__bs_nonsingle(wm,4,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_multi_8(t, h, o, a, c) \
|
|
__bs_nonsingle(wm,8,(t),(h),(o),(a),(c))
|
|
|
|
#define bus_space_write_multi_stream_1(t, h, o, a, c) \
|
|
__bs_nonsingle_s(wm,1,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_multi_stream_2(t, h, o, a, c) \
|
|
__bs_nonsingle_s(wm,2,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_multi_stream_4(t, h, o, a, c) \
|
|
__bs_nonsingle_s(wm,4,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_multi_stream_8(t, h, o, a, c) \
|
|
__bs_nonsingle_s(wm,8,(t),(h),(o),(a),(c))
|
|
|
|
/*
|
|
* Bus write region operations.
|
|
*/
|
|
#define bus_space_write_region_1(t, h, o, a, c) \
|
|
__bs_nonsingle(wr,1,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_region_2(t, h, o, a, c) \
|
|
__bs_nonsingle(wr,2,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_region_4(t, h, o, a, c) \
|
|
__bs_nonsingle(wr,4,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_region_8(t, h, o, a, c) \
|
|
__bs_nonsingle(wr,8,(t),(h),(o),(a),(c))
|
|
|
|
#define bus_space_write_region_stream_1(t, h, o, a, c) \
|
|
__bs_nonsingle_s(wr,1,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_region_stream_2(t, h, o, a, c) \
|
|
__bs_nonsingle_s(wr,2,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_region_stream_4(t, h, o, a, c) \
|
|
__bs_nonsingle_s(wr,4,(t),(h),(o),(a),(c))
|
|
#define bus_space_write_region_stream_8(t, h, o, a, c) \
|
|
__bs_nonsingle_s(wr,8,(t),(h),(o),(a),(c))
|
|
|
|
/*
|
|
* Set multiple operations.
|
|
*/
|
|
#define bus_space_set_multi_1(t, h, o, v, c) \
|
|
__bs_set(sm,1,(t),(h),(o),(v),(c))
|
|
#define bus_space_set_multi_2(t, h, o, v, c) \
|
|
__bs_set(sm,2,(t),(h),(o),(v),(c))
|
|
#define bus_space_set_multi_4(t, h, o, v, c) \
|
|
__bs_set(sm,4,(t),(h),(o),(v),(c))
|
|
#define bus_space_set_multi_8(t, h, o, v, c) \
|
|
__bs_set(sm,8,(t),(h),(o),(v),(c))
|
|
|
|
#define bus_space_set_multi_stream_1(t, h, o, v, c) \
|
|
bus_space_set_multi_1((t), (h), (o), (v), (c))
|
|
#define bus_space_set_multi_stream_2(t, h, o, v, c) \
|
|
bus_space_set_multi_2((t), (h), (o), (v), (c))
|
|
#define bus_space_set_multi_stream_4(t, h, o, v, c) \
|
|
bus_space_set_multi_4((t), (h), (o), (v), (c))
|
|
#define bus_space_set_multi_stream_8(t, h, o, v, c) \
|
|
bus_space_set_multi_8((t), (h), (o), (v), (c))
|
|
|
|
/*
|
|
* Set region operations.
|
|
*/
|
|
#define bus_space_set_region_1(t, h, o, v, c) \
|
|
__bs_set(sr,1,(t),(h),(o),(v),(c))
|
|
#define bus_space_set_region_2(t, h, o, v, c) \
|
|
__bs_set(sr,2,(t),(h),(o),(v),(c))
|
|
#define bus_space_set_region_4(t, h, o, v, c) \
|
|
__bs_set(sr,4,(t),(h),(o),(v),(c))
|
|
#define bus_space_set_region_8(t, h, o, v, c) \
|
|
__bs_set(sr,8,(t),(h),(o),(v),(c))
|
|
|
|
#define bus_space_set_region_stream_1(t, h, o, v, c) \
|
|
bus_space_set_region_1((t), (h), (o), (v), (c))
|
|
#define bus_space_set_region_stream_2(t, h, o, v, c) \
|
|
bus_space_set_region_2((t), (h), (o), (v), (c))
|
|
#define bus_space_set_region_stream_4(t, h, o, v, c) \
|
|
bus_space_set_region_4((t), (h), (o), (v), (c))
|
|
#define bus_space_set_region_stream_8(t, h, o, v, c) \
|
|
bus_space_set_region_8((t), (h), (o), (v), (c))
|
|
|
|
/*
|
|
* Copy operations.
|
|
*/
|
|
#define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
|
|
__bs_copy(1, t, h1, o1, h2, o2, c)
|
|
#define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
|
|
__bs_copy(2, t, h1, o1, h2, o2, c)
|
|
#define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
|
|
__bs_copy(4, t, h1, o1, h2, o2, c)
|
|
#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \
|
|
__bs_copy(8, t, h1, o1, h2, o2, c)
|
|
|
|
/*
|
|
* Poke (checked write) operations.
|
|
*/
|
|
#define bus_space_poke_1(t, h, o, v) __bs_poke(1, (t), (h), (o), (v))
|
|
#define bus_space_poke_2(t, h, o, v) __bs_poke(2, (t), (h), (o), (v))
|
|
#define bus_space_poke_4(t, h, o, v) __bs_poke(4, (t), (h), (o), (v))
|
|
#define bus_space_poke_8(t, h, o, v) __bs_poke(8, (t), (h), (o), (v))
|
|
|
|
/*
|
|
* Peek (checked read) operations.
|
|
*/
|
|
#define bus_space_peek_1(t, h, o, vp) __bs_peek(1, (t), (h), (o), (vp))
|
|
#define bus_space_peek_2(t, h, o, vp) __bs_peek(2, (t), (h), (o), (vp))
|
|
#define bus_space_peek_4(t, h, o, vp) __bs_peek(4, (t), (h), (o), (vp))
|
|
#define bus_space_peek_8(t, h, o, vp) __bs_peek(8, (t), (h), (o), (vp))
|
|
|
|
#endif /* !SAN_NEEDS_INTERCEPTORS */
|
|
|
|
#include <machine/bus_dma.h>
|
|
|
|
#endif /* _MACHINE_BUS_H_ */
|
|
|
|
#endif /* !__arm__ */
|