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https://github.com/freebsd/freebsd-src
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7e6437c084
To support recent extensions to the Arm architecture we may need to store more or larger registers when sending a signal. To support this create a list of these extra registers. Userspace that needs to access a register in the signal handler can then walk the list to find the correct register struct and read/write its contents. Reviewed by: kib, markj (earlier version) Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D43302
741 lines
18 KiB
C
741 lines
18 KiB
C
/*-
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* Copyright (c) 2014 Andrew Turner
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/exec.h>
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#include <sys/imgact.h>
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#include <sys/kdb.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/limits.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/ptrace.h>
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#include <sys/reg.h>
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#include <sys/rwlock.h>
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#include <sys/signalvar.h>
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#include <sys/syscallsubr.h>
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#include <sys/sysent.h>
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#include <sys/sysproto.h>
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#include <sys/ucontext.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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#include <vm/pmap.h>
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#include <vm/vm_map.h>
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#include <machine/armreg.h>
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#include <machine/kdb.h>
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#include <machine/md_var.h>
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#include <machine/pcb.h>
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#ifdef VFP
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#include <machine/vfp.h>
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#endif
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_Static_assert(sizeof(mcontext_t) == 880, "mcontext_t size incorrect");
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_Static_assert(sizeof(ucontext_t) == 960, "ucontext_t size incorrect");
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_Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect");
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static void get_fpcontext(struct thread *td, mcontext_t *mcp);
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static void set_fpcontext(struct thread *td, mcontext_t *mcp);
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int
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fill_regs(struct thread *td, struct reg *regs)
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{
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struct trapframe *frame;
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frame = td->td_frame;
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regs->sp = frame->tf_sp;
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regs->lr = frame->tf_lr;
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regs->elr = frame->tf_elr;
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regs->spsr = frame->tf_spsr;
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memcpy(regs->x, frame->tf_x, sizeof(regs->x));
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#ifdef COMPAT_FREEBSD32
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/*
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* We may be called here for a 32bits process, if we're using a
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* 64bits debugger. If so, put PC and SPSR where it expects it.
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*/
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if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
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regs->x[15] = frame->tf_elr;
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regs->x[16] = frame->tf_spsr;
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}
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#endif
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return (0);
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}
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int
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set_regs(struct thread *td, struct reg *regs)
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{
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struct trapframe *frame;
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frame = td->td_frame;
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frame->tf_sp = regs->sp;
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frame->tf_lr = regs->lr;
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memcpy(frame->tf_x, regs->x, sizeof(frame->tf_x));
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#ifdef COMPAT_FREEBSD32
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if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
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/*
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* We may be called for a 32bits process if we're using
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* a 64bits debugger. If so, get PC and SPSR from where
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* it put it.
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*/
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frame->tf_elr = regs->x[15];
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frame->tf_spsr &= ~PSR_SETTABLE_32;
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frame->tf_spsr |= regs->x[16] & PSR_SETTABLE_32;
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/* Don't allow userspace to ask to continue single stepping.
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* The SPSR.SS field doesn't exist when the EL1 is AArch32.
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* As the SPSR.DIT field has moved in its place don't
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* allow userspace to set the SPSR.SS field.
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*/
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} else
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#endif
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{
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frame->tf_elr = regs->elr;
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/*
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* frame->tf_spsr and regs->spsr on FreeBSD 13 was 32-bit
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* where from 14 they are 64 bit. As PSR_SETTABLE_64 clears
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* the upper 32 bits no compatibility handling is needed,
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* however if this is ever not the case we will need to add
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* these, similar to how it is done in set_mcontext.
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*/
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frame->tf_spsr &= ~PSR_SETTABLE_64;
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frame->tf_spsr |= regs->spsr & PSR_SETTABLE_64;
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/* Enable single stepping if userspace asked fot it */
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if ((frame->tf_spsr & PSR_SS) != 0) {
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td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
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WRITE_SPECIALREG(mdscr_el1,
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READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
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isb();
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}
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}
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return (0);
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}
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int
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fill_fpregs(struct thread *td, struct fpreg *regs)
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{
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#ifdef VFP
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struct pcb *pcb;
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pcb = td->td_pcb;
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if ((pcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
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/*
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* If we have just been running VFP instructions we will
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* need to save the state to memcpy it below.
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*/
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if (td == curthread)
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vfp_save_state(td, pcb);
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}
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KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
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("Called fill_fpregs while the kernel is using the VFP"));
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memcpy(regs->fp_q, pcb->pcb_fpustate.vfp_regs,
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sizeof(regs->fp_q));
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regs->fp_cr = pcb->pcb_fpustate.vfp_fpcr;
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regs->fp_sr = pcb->pcb_fpustate.vfp_fpsr;
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#else
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memset(regs, 0, sizeof(*regs));
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#endif
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return (0);
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}
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int
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set_fpregs(struct thread *td, struct fpreg *regs)
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{
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#ifdef VFP
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struct pcb *pcb;
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pcb = td->td_pcb;
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KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
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("Called set_fpregs while the kernel is using the VFP"));
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memcpy(pcb->pcb_fpustate.vfp_regs, regs->fp_q, sizeof(regs->fp_q));
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pcb->pcb_fpustate.vfp_fpcr = regs->fp_cr;
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pcb->pcb_fpustate.vfp_fpsr = regs->fp_sr;
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#endif
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return (0);
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}
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int
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fill_dbregs(struct thread *td, struct dbreg *regs)
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{
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struct debug_monitor_state *monitor;
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int i;
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uint8_t debug_ver, nbkpts, nwtpts;
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memset(regs, 0, sizeof(*regs));
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extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_DebugVer_SHIFT,
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&debug_ver);
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extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_BRPs_SHIFT,
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&nbkpts);
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extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_WRPs_SHIFT,
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&nwtpts);
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/*
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* The BRPs field contains the number of breakpoints - 1. Armv8-A
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* allows the hardware to provide 2-16 breakpoints so this won't
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* overflow an 8 bit value. The same applies to the WRPs field.
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*/
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nbkpts++;
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nwtpts++;
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regs->db_debug_ver = debug_ver;
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regs->db_nbkpts = nbkpts;
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regs->db_nwtpts = nwtpts;
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monitor = &td->td_pcb->pcb_dbg_regs;
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if ((monitor->dbg_flags & DBGMON_ENABLED) != 0) {
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for (i = 0; i < nbkpts; i++) {
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regs->db_breakregs[i].dbr_addr = monitor->dbg_bvr[i];
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regs->db_breakregs[i].dbr_ctrl = monitor->dbg_bcr[i];
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}
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for (i = 0; i < nwtpts; i++) {
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regs->db_watchregs[i].dbw_addr = monitor->dbg_wvr[i];
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regs->db_watchregs[i].dbw_ctrl = monitor->dbg_wcr[i];
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}
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}
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return (0);
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}
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int
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set_dbregs(struct thread *td, struct dbreg *regs)
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{
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struct debug_monitor_state *monitor;
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uint64_t addr;
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uint32_t ctrl;
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int i;
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monitor = &td->td_pcb->pcb_dbg_regs;
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monitor->dbg_enable_count = 0;
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for (i = 0; i < DBG_BRP_MAX; i++) {
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addr = regs->db_breakregs[i].dbr_addr;
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ctrl = regs->db_breakregs[i].dbr_ctrl;
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/*
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* Don't let the user set a breakpoint on a kernel or
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* non-canonical user address.
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*/
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if (addr >= VM_MAXUSER_ADDRESS)
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return (EINVAL);
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/*
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* The lowest 2 bits are ignored, so record the effective
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* address.
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*/
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addr = rounddown2(addr, 4);
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/*
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* Some control fields are ignored, and other bits reserved.
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* Only unlinked, address-matching breakpoints are supported.
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*
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* XXX: fields that appear unvalidated, such as BAS, have
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* constrained undefined behaviour. If the user mis-programs
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* these, there is no risk to the system.
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*/
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ctrl &= DBGBCR_EN | DBGBCR_PMC | DBGBCR_BAS;
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if ((ctrl & DBGBCR_EN) != 0) {
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/* Only target EL0. */
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if ((ctrl & DBGBCR_PMC) != DBGBCR_PMC_EL0)
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return (EINVAL);
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monitor->dbg_enable_count++;
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}
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monitor->dbg_bvr[i] = addr;
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monitor->dbg_bcr[i] = ctrl;
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}
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for (i = 0; i < DBG_WRP_MAX; i++) {
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addr = regs->db_watchregs[i].dbw_addr;
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ctrl = regs->db_watchregs[i].dbw_ctrl;
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/*
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* Don't let the user set a watchpoint on a kernel or
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* non-canonical user address.
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*/
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if (addr >= VM_MAXUSER_ADDRESS)
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return (EINVAL);
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/*
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* Some control fields are ignored, and other bits reserved.
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* Only unlinked watchpoints are supported.
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*/
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ctrl &= DBGWCR_EN | DBGWCR_PAC | DBGWCR_LSC | DBGWCR_BAS |
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DBGWCR_MASK;
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if ((ctrl & DBGWCR_EN) != 0) {
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/* Only target EL0. */
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if ((ctrl & DBGWCR_PAC) != DBGWCR_PAC_EL0)
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return (EINVAL);
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/* Must set at least one of the load/store bits. */
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if ((ctrl & DBGWCR_LSC) == 0)
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return (EINVAL);
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/*
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* When specifying the address range with BAS, the MASK
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* field must be zero.
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*/
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if ((ctrl & DBGWCR_BAS) != DBGWCR_BAS &&
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(ctrl & DBGWCR_MASK) != 0)
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return (EINVAL);
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monitor->dbg_enable_count++;
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}
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monitor->dbg_wvr[i] = addr;
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monitor->dbg_wcr[i] = ctrl;
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}
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if (monitor->dbg_enable_count > 0)
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monitor->dbg_flags |= DBGMON_ENABLED;
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return (0);
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}
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#ifdef COMPAT_FREEBSD32
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int
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fill_regs32(struct thread *td, struct reg32 *regs)
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{
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int i;
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struct trapframe *tf;
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tf = td->td_frame;
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for (i = 0; i < 13; i++)
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regs->r[i] = tf->tf_x[i];
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/* For arm32, SP is r13 and LR is r14 */
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regs->r_sp = tf->tf_x[13];
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regs->r_lr = tf->tf_x[14];
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regs->r_pc = tf->tf_elr;
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regs->r_cpsr = tf->tf_spsr;
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return (0);
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}
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int
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set_regs32(struct thread *td, struct reg32 *regs)
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{
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int i;
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struct trapframe *tf;
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tf = td->td_frame;
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for (i = 0; i < 13; i++)
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tf->tf_x[i] = regs->r[i];
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/* For arm 32, SP is r13 an LR is r14 */
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tf->tf_x[13] = regs->r_sp;
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tf->tf_x[14] = regs->r_lr;
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tf->tf_elr = regs->r_pc;
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tf->tf_spsr &= ~PSR_SETTABLE_32;
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tf->tf_spsr |= regs->r_cpsr & PSR_SETTABLE_32;
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return (0);
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}
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/* XXX fill/set dbregs/fpregs are stubbed on 32-bit arm. */
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int
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fill_fpregs32(struct thread *td, struct fpreg32 *regs)
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{
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memset(regs, 0, sizeof(*regs));
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return (0);
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}
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int
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set_fpregs32(struct thread *td, struct fpreg32 *regs)
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{
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return (0);
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}
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int
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fill_dbregs32(struct thread *td, struct dbreg32 *regs)
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{
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memset(regs, 0, sizeof(*regs));
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return (0);
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}
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int
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set_dbregs32(struct thread *td, struct dbreg32 *regs)
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{
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return (0);
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}
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#endif
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void
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exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
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{
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struct trapframe *tf = td->td_frame;
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struct pcb *pcb = td->td_pcb;
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memset(tf, 0, sizeof(struct trapframe));
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tf->tf_x[0] = stack;
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tf->tf_sp = STACKALIGN(stack);
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tf->tf_lr = imgp->entry_addr;
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tf->tf_elr = imgp->entry_addr;
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td->td_pcb->pcb_tpidr_el0 = 0;
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td->td_pcb->pcb_tpidrro_el0 = 0;
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WRITE_SPECIALREG(tpidrro_el0, 0);
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WRITE_SPECIALREG(tpidr_el0, 0);
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#ifdef VFP
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vfp_reset_state(td, pcb);
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#endif
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/*
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* Clear debug register state. It is not applicable to the new process.
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*/
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bzero(&pcb->pcb_dbg_regs, sizeof(pcb->pcb_dbg_regs));
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/* Generate new pointer authentication keys */
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ptrauth_exec(td);
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}
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/* Sanity check these are the same size, they will be memcpy'd to and from */
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CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
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sizeof((struct gpregs *)0)->gp_x);
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CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
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sizeof((struct reg *)0)->x);
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int
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get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
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{
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struct trapframe *tf = td->td_frame;
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if (clear_ret & GET_MC_CLEAR_RET) {
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mcp->mc_gpregs.gp_x[0] = 0;
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mcp->mc_gpregs.gp_spsr = tf->tf_spsr & ~PSR_C;
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} else {
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mcp->mc_gpregs.gp_x[0] = tf->tf_x[0];
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mcp->mc_gpregs.gp_spsr = tf->tf_spsr;
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}
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memcpy(&mcp->mc_gpregs.gp_x[1], &tf->tf_x[1],
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sizeof(mcp->mc_gpregs.gp_x[1]) * (nitems(mcp->mc_gpregs.gp_x) - 1));
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mcp->mc_gpregs.gp_sp = tf->tf_sp;
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mcp->mc_gpregs.gp_lr = tf->tf_lr;
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mcp->mc_gpregs.gp_elr = tf->tf_elr;
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get_fpcontext(td, mcp);
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return (0);
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}
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int
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set_mcontext(struct thread *td, mcontext_t *mcp)
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{
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#define PSR_13_MASK 0xfffffffful
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struct arm64_reg_context ctx;
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struct trapframe *tf = td->td_frame;
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uint64_t spsr;
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vm_offset_t addr;
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int error;
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bool done;
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spsr = mcp->mc_gpregs.gp_spsr;
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#ifdef COMPAT_FREEBSD13
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if (td->td_proc->p_osrel < P_OSREL_ARM64_SPSR) {
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/*
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* Before FreeBSD 14 gp_spsr was 32 bit. The size of mc_gpregs
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* was identical because of padding so mask of the upper bits
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* that may be invalid on earlier releases.
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*/
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spsr &= PSR_13_MASK;
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}
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#endif
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if ((spsr & PSR_M_MASK) != PSR_M_EL0t ||
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(spsr & PSR_AARCH32) != 0 ||
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(spsr & PSR_DAIF) != (td->td_frame->tf_spsr & PSR_DAIF))
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return (EINVAL);
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memcpy(tf->tf_x, mcp->mc_gpregs.gp_x, sizeof(tf->tf_x));
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|
|
|
tf->tf_sp = mcp->mc_gpregs.gp_sp;
|
|
tf->tf_lr = mcp->mc_gpregs.gp_lr;
|
|
tf->tf_elr = mcp->mc_gpregs.gp_elr;
|
|
#ifdef COMPAT_FREEBSD13
|
|
if (td->td_proc->p_osrel < P_OSREL_ARM64_SPSR) {
|
|
/* Keep the upper 32 bits of spsr on older releases */
|
|
tf->tf_spsr &= ~PSR_13_MASK;
|
|
tf->tf_spsr |= spsr;
|
|
} else
|
|
#endif
|
|
tf->tf_spsr = spsr;
|
|
if ((tf->tf_spsr & PSR_SS) != 0) {
|
|
td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
|
|
|
|
WRITE_SPECIALREG(mdscr_el1,
|
|
READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
|
|
isb();
|
|
}
|
|
|
|
set_fpcontext(td, mcp);
|
|
|
|
/* Read any register contexts we find */
|
|
if (mcp->mc_ptr != 0) {
|
|
addr = mcp->mc_ptr;
|
|
|
|
done = false;
|
|
do {
|
|
if (!__is_aligned(addr,
|
|
_Alignof(struct arm64_reg_context)))
|
|
return (EINVAL);
|
|
|
|
error = copyin((const void *)addr, &ctx, sizeof(ctx));
|
|
if (error != 0)
|
|
return (error);
|
|
|
|
switch (ctx.ctx_id) {
|
|
case ARM64_CTX_END:
|
|
done = true;
|
|
break;
|
|
default:
|
|
return (EINVAL);
|
|
}
|
|
|
|
addr += ctx.ctx_size;
|
|
} while (!done);
|
|
}
|
|
|
|
return (0);
|
|
#undef PSR_13_MASK
|
|
}
|
|
|
|
static void
|
|
get_fpcontext(struct thread *td, mcontext_t *mcp)
|
|
{
|
|
#ifdef VFP
|
|
struct pcb *curpcb;
|
|
|
|
MPASS(td == curthread);
|
|
|
|
curpcb = curthread->td_pcb;
|
|
if ((curpcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
|
|
/*
|
|
* If we have just been running VFP instructions we will
|
|
* need to save the state to memcpy it below.
|
|
*/
|
|
vfp_save_state(td, curpcb);
|
|
}
|
|
|
|
KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
|
|
("Called get_fpcontext while the kernel is using the VFP"));
|
|
KASSERT((curpcb->pcb_fpflags & ~PCB_FP_USERMASK) == 0,
|
|
("Non-userspace FPU flags set in get_fpcontext"));
|
|
memcpy(mcp->mc_fpregs.fp_q, curpcb->pcb_fpustate.vfp_regs,
|
|
sizeof(mcp->mc_fpregs.fp_q));
|
|
mcp->mc_fpregs.fp_cr = curpcb->pcb_fpustate.vfp_fpcr;
|
|
mcp->mc_fpregs.fp_sr = curpcb->pcb_fpustate.vfp_fpsr;
|
|
mcp->mc_fpregs.fp_flags = curpcb->pcb_fpflags;
|
|
mcp->mc_flags |= _MC_FP_VALID;
|
|
#endif
|
|
}
|
|
|
|
static void
|
|
set_fpcontext(struct thread *td, mcontext_t *mcp)
|
|
{
|
|
#ifdef VFP
|
|
struct pcb *curpcb;
|
|
|
|
MPASS(td == curthread);
|
|
if ((mcp->mc_flags & _MC_FP_VALID) != 0) {
|
|
curpcb = curthread->td_pcb;
|
|
|
|
/*
|
|
* Discard any vfp state for the current thread, we
|
|
* are about to override it.
|
|
*/
|
|
critical_enter();
|
|
vfp_discard(td);
|
|
critical_exit();
|
|
|
|
KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
|
|
("Called set_fpcontext while the kernel is using the VFP"));
|
|
memcpy(curpcb->pcb_fpustate.vfp_regs, mcp->mc_fpregs.fp_q,
|
|
sizeof(mcp->mc_fpregs.fp_q));
|
|
curpcb->pcb_fpustate.vfp_fpcr = mcp->mc_fpregs.fp_cr;
|
|
curpcb->pcb_fpustate.vfp_fpsr = mcp->mc_fpregs.fp_sr;
|
|
curpcb->pcb_fpflags = mcp->mc_fpregs.fp_flags & PCB_FP_USERMASK;
|
|
}
|
|
#endif
|
|
}
|
|
|
|
int
|
|
sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
|
|
{
|
|
ucontext_t uc;
|
|
int error;
|
|
|
|
if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
|
|
return (EFAULT);
|
|
|
|
error = set_mcontext(td, &uc.uc_mcontext);
|
|
if (error != 0)
|
|
return (error);
|
|
|
|
/* Restore signal mask. */
|
|
kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
|
|
|
|
return (EJUSTRETURN);
|
|
}
|
|
|
|
static bool
|
|
sendsig_ctx_end(struct thread *td, vm_offset_t *addrp)
|
|
{
|
|
struct arm64_reg_context end_ctx;
|
|
vm_offset_t ctx_addr;
|
|
|
|
*addrp -= sizeof(end_ctx);
|
|
ctx_addr = *addrp;
|
|
|
|
memset(&end_ctx, 0, sizeof(end_ctx));
|
|
end_ctx.ctx_id = ARM64_CTX_END;
|
|
end_ctx.ctx_size = sizeof(end_ctx);
|
|
|
|
if (copyout(&end_ctx, (void *)ctx_addr, sizeof(end_ctx)) != 0)
|
|
return (false);
|
|
|
|
return (true);
|
|
}
|
|
|
|
typedef bool(*ctx_func)(struct thread *, vm_offset_t *);
|
|
static const ctx_func ctx_funcs[] = {
|
|
sendsig_ctx_end, /* Must be first to end the linked list */
|
|
NULL,
|
|
};
|
|
|
|
void
|
|
sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
|
|
{
|
|
struct thread *td;
|
|
struct proc *p;
|
|
struct trapframe *tf;
|
|
struct sigframe *fp, frame;
|
|
struct sigacts *psp;
|
|
vm_offset_t addr;
|
|
int onstack, sig;
|
|
|
|
td = curthread;
|
|
p = td->td_proc;
|
|
PROC_LOCK_ASSERT(p, MA_OWNED);
|
|
|
|
sig = ksi->ksi_signo;
|
|
psp = p->p_sigacts;
|
|
mtx_assert(&psp->ps_mtx, MA_OWNED);
|
|
|
|
tf = td->td_frame;
|
|
onstack = sigonstack(tf->tf_sp);
|
|
|
|
CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
|
|
catcher, sig);
|
|
|
|
/* Allocate and validate space for the signal handler context. */
|
|
if ((td->td_pflags & TDP_ALTSTACK) != 0 && !onstack &&
|
|
SIGISMEMBER(psp->ps_sigonstack, sig)) {
|
|
addr = ((uintptr_t)td->td_sigstk.ss_sp +
|
|
td->td_sigstk.ss_size);
|
|
#if defined(COMPAT_43)
|
|
td->td_sigstk.ss_flags |= SS_ONSTACK;
|
|
#endif
|
|
} else {
|
|
addr = td->td_frame->tf_sp;
|
|
}
|
|
|
|
/* Fill in the frame to copy out */
|
|
bzero(&frame, sizeof(frame));
|
|
get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
|
|
frame.sf_si = ksi->ksi_info;
|
|
frame.sf_uc.uc_sigmask = *mask;
|
|
frame.sf_uc.uc_stack = td->td_sigstk;
|
|
frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ?
|
|
(onstack ? SS_ONSTACK : 0) : SS_DISABLE;
|
|
mtx_unlock(&psp->ps_mtx);
|
|
PROC_UNLOCK(td->td_proc);
|
|
|
|
for (int i = 0; ctx_funcs[i] != NULL; i++) {
|
|
if (!ctx_funcs[i](td, &addr)) {
|
|
/* Process has trashed its stack. Kill it. */
|
|
CTR4(KTR_SIG,
|
|
"sendsig: frame sigexit td=%p fp=%#lx func[%d]=%p",
|
|
td, addr, i, ctx_funcs[i]);
|
|
PROC_LOCK(p);
|
|
sigexit(td, SIGILL);
|
|
/* NOTREACHED */
|
|
}
|
|
}
|
|
|
|
/* Point at the first context */
|
|
frame.sf_uc.uc_mcontext.mc_ptr = addr;
|
|
|
|
/* Make room, keeping the stack aligned */
|
|
fp = (struct sigframe *)addr;
|
|
fp--;
|
|
fp = (struct sigframe *)STACKALIGN(fp);
|
|
|
|
/* Copy the sigframe out to the user's stack. */
|
|
if (copyout(&frame, fp, sizeof(*fp)) != 0) {
|
|
/* Process has trashed its stack. Kill it. */
|
|
CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
|
|
PROC_LOCK(p);
|
|
sigexit(td, SIGILL);
|
|
}
|
|
|
|
tf->tf_x[0] = sig;
|
|
tf->tf_x[1] = (register_t)&fp->sf_si;
|
|
tf->tf_x[2] = (register_t)&fp->sf_uc;
|
|
tf->tf_x[8] = (register_t)catcher;
|
|
tf->tf_sp = (register_t)fp;
|
|
tf->tf_elr = (register_t)PROC_SIGCODE(p);
|
|
|
|
/* Clear the single step flag while in the signal handler */
|
|
if ((td->td_pcb->pcb_flags & PCB_SINGLE_STEP) != 0) {
|
|
td->td_pcb->pcb_flags &= ~PCB_SINGLE_STEP;
|
|
WRITE_SPECIALREG(mdscr_el1,
|
|
READ_SPECIALREG(mdscr_el1) & ~MDSCR_SS);
|
|
isb();
|
|
}
|
|
|
|
CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_elr,
|
|
tf->tf_sp);
|
|
|
|
PROC_LOCK(p);
|
|
mtx_lock(&psp->ps_mtx);
|
|
}
|