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c190fb35f3
Background: The pm_ev field of struct pmc_op_pmcallocate and struct pmc traditionally contains the index of the chosen event, corresponding to the __PMC_EVENTS array in pmc_events.h. This is a static list of events, maintained by FreeBSD. In the usual case, libpmc translates the user supplied event name (string) into the pm_ev index, which is passed as an argument to the allocation syscall. On the kernel side, the allocation method for the relevant hwpmc class translates the given index into the event code that will be written to an event selection register. In 2018, a new source of performance event definitions was introduced: the pmu-events json files, which are maintained by the Linux kernel. The result was better coverage for newer Intel processors with a reduced maintenance burden for libpmc/hwpmc. Intel and AMD CPUs were unconditionally switched to allocate events from pmu-events instead of the traditional scheme (959826ca1b
,81eb4dcf9e
). Under the pmu-events scheme, the pm_ev field contains an index corresponding to the selected event from the pmu-events table, something which the kernel has no knowledge of. The configuration for the performance counting registers is instead passed via class-dependent fields (struct pmc_md_op_pmcallocate). In 2021 I changed the allocation logic so that it would attempt to pull from the pmu-events table first, and fall-back to the traditional method (dfb4fb4116
). Later, pmu-events support for arm64 and power8 CPUs was added (28dd6730a5
andb48a2770d4
). The problem that remains is that the pm_ev field is overloaded, without a definitive way to determine whether the event allocation came from the pmu-events table or FreeBSD's statically-defined PMC events. This resulted in a recent fix,21f7397a61
. Change: To disambiguate these two supported but separate use-cases, add a new flag, PMC_F_EV_PMU, to be set as part of the allocation, indicating that the event index came from pmu-events. This is useful in two ways: 1. On the kernel side, we can validate the syscall arguments better. Some classes support only the traditional event scheme (e.g. hwpmc_armv7), while others support only the pmu-events method (e.g. hwpmc_core for Intel). We can now check for this. The hwpmc_arm64 class supports both methods, so the new flag supersedes the existing MD flag, PM_MD_EVENT_RAW. 2. The flag will be tracked in struct pmc for the duration of its lifetime, meaning it is communicated back to userspace. This allows libpmc to perform the reverse index-to-event-name translation without speculating about the meaning of the index value. Adding the flag is a backwards-incompatible ABI change. We recently bumped the major version of the hwpmc module, so this breakage is acceptable. Reviewed by: jkoshy MFC after: 3 days Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D40753
685 lines
18 KiB
C
685 lines
18 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2018, Matthew Macy
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* Copyright (c) 2021, The FreeBSD Foundation
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*
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* Portions of this software were developed by Mitchell Horne
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* under sponsorship from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/types.h>
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#include <sys/errno.h>
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#include <sys/pmc.h>
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#include <sys/sysctl.h>
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#include <stddef.h>
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#include <stdlib.h>
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#include <limits.h>
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#include <regex.h>
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#include <string.h>
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#include <pmc.h>
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#include <pmclog.h>
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#include <assert.h>
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#include <libpmcstat.h>
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#include "pmu-events/pmu-events.h"
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struct pmu_alias {
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const char *pa_alias;
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const char *pa_name;
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};
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#if defined(__amd64__) || defined(__i386__)
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typedef enum {
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PMU_INVALID,
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PMU_INTEL,
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PMU_AMD,
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} pmu_mfr_t;
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static struct pmu_alias pmu_intel_alias_table[] = {
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{"UNHALTED_CORE_CYCLES", "cpu_clk_unhalted.thread"},
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{"UNHALTED-CORE-CYCLES", "cpu_clk_unhalted.thread"},
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{"LLC_MISSES", "LONGEST_LAT_CACHE.MISS"},
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{"LLC-MISSES", "LONGEST_LAT_CACHE.MISS"},
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{"LLC_REFERENCE", "LONGEST_LAT_CACHE.REFERENCE"},
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{"LLC-REFERENCE", "LONGEST_LAT_CACHE.REFERENCE"},
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{"LLC_MISS_RHITM", "mem_load_l3_miss_retired.remote_hitm"},
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{"LLC-MISS-RHITM", "mem_load_l3_miss_retired.remote_hitm"},
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{"RESOURCE_STALL", "RESOURCE_STALLS.ANY"},
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{"RESOURCE_STALLS_ANY", "RESOURCE_STALLS.ANY"},
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{"BRANCH_INSTRUCTION_RETIRED", "BR_INST_RETIRED.ALL_BRANCHES"},
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{"BRANCH-INSTRUCTION-RETIRED", "BR_INST_RETIRED.ALL_BRANCHES"},
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{"BRANCH_MISSES_RETIRED", "BR_MISP_RETIRED.ALL_BRANCHES"},
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{"BRANCH-MISSES-RETIRED", "BR_MISP_RETIRED.ALL_BRANCHES"},
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{"unhalted-cycles", "cpu_clk_unhalted.thread"},
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{"instructions", "inst_retired.any"},
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{"branch-mispredicts", "br_misp_retired.all_branches"},
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{"branches", "br_inst_retired.all_branches"},
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{"interrupts", "hw_interrupts.received"},
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{"ic-misses", "frontend_retired.l1i_miss"},
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{NULL, NULL},
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};
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static struct pmu_alias pmu_amd_alias_table[] = {
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{"UNHALTED_CORE_CYCLES", "ls_not_halted_cyc"},
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{"UNHALTED-CORE-CYCLES", "ls_not_halted_cyc"},
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{"LLC_MISSES", "l3_comb_clstr_state.request_miss"},
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{"LLC-MISSES", "l3_comb_clstr_state.request_miss"},
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{"LLC_REFERENCE", "l3_request_g1.caching_l3_cache_accesses"},
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{"LLC-REFERENCE", "l3_request_g1.caching_l3_cache_accesses"},
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{"BRANCH_INSTRUCTION_RETIRED", "ex_ret_brn"},
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{"BRANCH-INSTRUCTION-RETIRED", "ex_ret_brn"},
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{"BRANCH_MISSES_RETIRED", "ex_ret_brn_misp"},
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{"BRANCH-MISSES-RETIRED", "ex_ret_brn_misp"},
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{"unhalted-cycles", "ls_not_halted_cyc"},
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{"instructions", "ex_ret_instr",},
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{"branch-mispredicts", "ex_ret_brn_misp"},
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{"branches", "ex_ret_brn"},
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{"interrupts", "ls_int_taken"}, /* Not on amdzen1 */
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{NULL, NULL},
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};
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static pmu_mfr_t
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pmu_events_mfr(void)
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{
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char buf[PMC_CPUID_LEN];
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size_t s = sizeof(buf);
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pmu_mfr_t mfr;
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if (sysctlbyname("kern.hwpmc.cpuid", buf, &s,
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(void *)NULL, 0) == -1)
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return (PMU_INVALID);
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if (strcasestr(buf, "AuthenticAMD") != NULL ||
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strcasestr(buf, "HygonGenuine") != NULL)
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mfr = PMU_AMD;
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else if (strcasestr(buf, "GenuineIntel") != NULL)
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mfr = PMU_INTEL;
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else
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mfr = PMU_INVALID;
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return (mfr);
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}
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/*
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* The Intel fixed mode counters are:
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* "inst_retired.any",
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* "cpu_clk_unhalted.thread",
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* "cpu_clk_unhalted.thread_any",
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* "cpu_clk_unhalted.ref_tsc",
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*
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*/
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static const char *
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pmu_alias_get(const char *name)
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{
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pmu_mfr_t mfr;
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struct pmu_alias *pa;
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struct pmu_alias *pmu_alias_table;
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if ((mfr = pmu_events_mfr()) == PMU_INVALID)
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return (name);
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if (mfr == PMU_AMD)
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pmu_alias_table = pmu_amd_alias_table;
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else if (mfr == PMU_INTEL)
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pmu_alias_table = pmu_intel_alias_table;
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else
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return (name);
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for (pa = pmu_alias_table; pa->pa_alias != NULL; pa++)
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if (strcasecmp(name, pa->pa_alias) == 0)
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return (pa->pa_name);
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return (name);
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}
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#elif defined(__powerpc64__)
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static const char *
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pmu_alias_get(const char *name)
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{
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return (name);
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}
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#elif defined(__aarch64__)
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static struct pmu_alias pmu_armv8_alias_table[] = {
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{"UNHALTED_CORE_CYCLES", "CPU_CYCLES"},
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{"UNHALTED-CORE-CYCLES", "CPU_CYCLES"},
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{"LLC_MISSES", "LL_CACHE_MISS_RD"},
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{"LLC-MISSES", "LL_CACHE_MISS_RD"},
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{"LLC_REFERENCE", "LL_CACHE_RD"},
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{"LLC-REFERENCE", "LL_CACHE_RD"},
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{"BRANCH_INSTRUCTION_RETIRED", "BR_RETIRED"},
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{"BRANCH-INSTRUCTION-RETIRED", "BR_RETIRED"},
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{"BRANCH_MISSES_RETIRED", "BR_MIS_PRED_RETIRED"},
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{"BRANCH-MISSES-RETIRED", "BR_MIS_PRED_RETIRED"},
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{"unhalted-cycles", "CPU_CYCLES"},
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{"instructions", "INST_RETIRED",},
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{"branch-mispredicts", "BR_MIS_PRED_RETIRED"},
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{"branches", "BR_RETIRED"},
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{"interrupts", "EXC_IRQ"},
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{NULL, NULL},
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};
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static const char *
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pmu_alias_get(const char *name)
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{
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struct pmu_alias *pa;
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for (pa = pmu_armv8_alias_table; pa->pa_alias != NULL; pa++)
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if (strcasecmp(name, pa->pa_alias) == 0)
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return (pa->pa_name);
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return (name);
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}
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#else
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static const char *
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pmu_alias_get(const char *name)
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{
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return (name);
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}
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#endif
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struct pmu_event_desc {
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uint64_t ped_period;
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uint64_t ped_offcore_rsp;
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uint64_t ped_l3_thread;
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uint64_t ped_l3_slice;
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uint32_t ped_event;
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uint32_t ped_frontend;
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uint32_t ped_ldlat;
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uint32_t ped_config1;
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int16_t ped_umask;
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uint8_t ped_cmask;
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uint8_t ped_any;
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uint8_t ped_inv;
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uint8_t ped_edge;
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uint8_t ped_fc_mask;
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uint8_t ped_ch_mask;
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};
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static const struct pmu_events_map *
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pmu_events_map_get(const char *cpuid)
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{
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regex_t re;
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regmatch_t pmatch[1];
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char buf[PMC_CPUID_LEN];
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size_t s = sizeof(buf);
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int match;
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const struct pmu_events_map *pme;
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if (cpuid != NULL) {
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strlcpy(buf, cpuid, s);
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} else {
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if (sysctlbyname("kern.hwpmc.cpuid", buf, &s,
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(void *)NULL, 0) == -1)
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return (NULL);
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}
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for (pme = pmu_events_map; pme->cpuid != NULL; pme++) {
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if (regcomp(&re, pme->cpuid, REG_EXTENDED) != 0) {
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printf("regex '%s' failed to compile, ignoring\n",
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pme->cpuid);
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continue;
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}
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match = regexec(&re, buf, 1, pmatch, 0);
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regfree(&re);
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if (match == 0) {
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if (pmatch[0].rm_so == 0 && (buf[pmatch[0].rm_eo] == 0
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|| buf[pmatch[0].rm_eo] == '-'))
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return (pme);
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}
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}
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return (NULL);
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}
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static const struct pmu_event *
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pmu_event_get(const char *cpuid, const char *event_name, int *idx)
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{
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const struct pmu_events_map *pme;
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const struct pmu_event *pe;
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int i;
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if ((pme = pmu_events_map_get(cpuid)) == NULL)
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return (NULL);
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for (i = 0, pe = pme->table; pe->name || pe->desc || pe->event; pe++, i++) {
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if (pe->name == NULL)
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continue;
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if (strcasecmp(pe->name, event_name) == 0) {
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if (idx)
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*idx = i;
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return (pe);
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}
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}
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return (NULL);
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}
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int
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pmc_pmu_idx_get_by_event(const char *cpuid, const char *event)
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{
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int idx;
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const char *realname;
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realname = pmu_alias_get(event);
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if (pmu_event_get(cpuid, realname, &idx) == NULL)
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return (-1);
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return (idx);
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}
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const char *
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pmc_pmu_event_get_by_idx(const char *cpuid, int idx)
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{
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const struct pmu_events_map *pme;
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if ((pme = pmu_events_map_get(cpuid)) == NULL)
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return (NULL);
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assert(pme->table[idx].name);
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return (pme->table[idx].name);
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}
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static int
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pmu_parse_event(struct pmu_event_desc *ped, const char *eventin)
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{
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char *event;
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char *kvp, *key, *value, *r;
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char *debug;
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if ((event = strdup(eventin)) == NULL)
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return (ENOMEM);
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r = event;
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bzero(ped, sizeof(*ped));
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ped->ped_period = DEFAULT_SAMPLE_COUNT;
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ped->ped_umask = -1;
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while ((kvp = strsep(&event, ",")) != NULL) {
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key = strsep(&kvp, "=");
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if (key == NULL)
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abort();
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value = kvp;
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if (strcmp(key, "umask") == 0)
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ped->ped_umask = strtol(value, NULL, 16);
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else if (strcmp(key, "event") == 0)
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ped->ped_event = strtol(value, NULL, 16);
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else if (strcmp(key, "period") == 0)
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ped->ped_period = strtol(value, NULL, 10);
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else if (strcmp(key, "offcore_rsp") == 0)
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ped->ped_offcore_rsp = strtol(value, NULL, 16);
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else if (strcmp(key, "any") == 0)
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ped->ped_any = strtol(value, NULL, 10);
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else if (strcmp(key, "cmask") == 0)
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ped->ped_cmask = strtol(value, NULL, 10);
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else if (strcmp(key, "inv") == 0)
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ped->ped_inv = strtol(value, NULL, 10);
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else if (strcmp(key, "edge") == 0)
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ped->ped_edge = strtol(value, NULL, 10);
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else if (strcmp(key, "frontend") == 0)
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ped->ped_frontend = strtol(value, NULL, 16);
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else if (strcmp(key, "ldlat") == 0)
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ped->ped_ldlat = strtol(value, NULL, 16);
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else if (strcmp(key, "fc_mask") == 0)
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ped->ped_fc_mask = strtol(value, NULL, 16);
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else if (strcmp(key, "ch_mask") == 0)
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ped->ped_ch_mask = strtol(value, NULL, 16);
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else if (strcmp(key, "config1") == 0)
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ped->ped_config1 = strtol(value, NULL, 16);
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else if (strcmp(key, "l3_thread_mask") == 0)
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ped->ped_l3_thread = strtol(value, NULL, 16);
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else if (strcmp(key, "l3_slice_mask") == 0)
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ped->ped_l3_slice = strtol(value, NULL, 16);
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else {
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debug = getenv("PMUDEBUG");
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if (debug != NULL && strcmp(debug, "true") == 0 && value != NULL)
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printf("unrecognized kvpair: %s:%s\n", key, value);
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}
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}
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free(r);
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return (0);
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}
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uint64_t
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pmc_pmu_sample_rate_get(const char *event_name)
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{
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const struct pmu_event *pe;
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struct pmu_event_desc ped;
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event_name = pmu_alias_get(event_name);
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if ((pe = pmu_event_get(NULL, event_name, NULL)) == NULL)
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return (DEFAULT_SAMPLE_COUNT);
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if (pe->event == NULL)
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return (DEFAULT_SAMPLE_COUNT);
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if (pmu_parse_event(&ped, pe->event))
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return (DEFAULT_SAMPLE_COUNT);
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return (ped.ped_period);
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}
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int
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pmc_pmu_enabled(void)
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{
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return (pmu_events_map_get(NULL) != NULL);
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}
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void
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pmc_pmu_print_counters(const char *event_name)
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{
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const struct pmu_events_map *pme;
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const struct pmu_event *pe;
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struct pmu_event_desc ped;
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char *debug;
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int do_debug;
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debug = getenv("PMUDEBUG");
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do_debug = 0;
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if (debug != NULL && strcmp(debug, "true") == 0)
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do_debug = 1;
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if ((pme = pmu_events_map_get(NULL)) == NULL)
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return;
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for (pe = pme->table; pe->name || pe->desc || pe->event; pe++) {
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if (pe->name == NULL)
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continue;
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if (event_name != NULL && strcasestr(pe->name, event_name) == NULL)
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continue;
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printf("\t%s\n", pe->name);
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if (do_debug)
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pmu_parse_event(&ped, pe->event);
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}
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}
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void
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pmc_pmu_print_counter_desc(const char *ev)
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{
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const struct pmu_events_map *pme;
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const struct pmu_event *pe;
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if ((pme = pmu_events_map_get(NULL)) == NULL)
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return;
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for (pe = pme->table; pe->name || pe->desc || pe->event; pe++) {
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if (pe->name == NULL)
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continue;
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if (strcasestr(pe->name, ev) != NULL &&
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pe->desc != NULL)
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printf("%s:\t%s\n", pe->name, pe->desc);
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}
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}
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void
|
|
pmc_pmu_print_counter_desc_long(const char *ev)
|
|
{
|
|
const struct pmu_events_map *pme;
|
|
const struct pmu_event *pe;
|
|
|
|
if ((pme = pmu_events_map_get(NULL)) == NULL)
|
|
return;
|
|
for (pe = pme->table; pe->name || pe->desc || pe->event; pe++) {
|
|
if (pe->name == NULL)
|
|
continue;
|
|
if (strcasestr(pe->name, ev) != NULL) {
|
|
if (pe->long_desc != NULL)
|
|
printf("%s:\n%s\n", pe->name, pe->long_desc);
|
|
else if (pe->desc != NULL)
|
|
printf("%s:\t%s\n", pe->name, pe->desc);
|
|
}
|
|
}
|
|
}
|
|
|
|
void
|
|
pmc_pmu_print_counter_full(const char *ev)
|
|
{
|
|
const struct pmu_events_map *pme;
|
|
const struct pmu_event *pe;
|
|
|
|
if ((pme = pmu_events_map_get(NULL)) == NULL)
|
|
return;
|
|
for (pe = pme->table; pe->name || pe->desc || pe->event; pe++) {
|
|
if (pe->name == NULL)
|
|
continue;
|
|
if (strcasestr(pe->name, ev) == NULL)
|
|
continue;
|
|
printf("name: %s\n", pe->name);
|
|
if (pe->long_desc != NULL)
|
|
printf("desc: %s\n", pe->long_desc);
|
|
else if (pe->desc != NULL)
|
|
printf("desc: %s\n", pe->desc);
|
|
if (pe->event != NULL)
|
|
printf("event: %s\n", pe->event);
|
|
if (pe->topic != NULL)
|
|
printf("topic: %s\n", pe->topic);
|
|
if (pe->pmu != NULL)
|
|
printf("pmu: %s\n", pe->pmu);
|
|
if (pe->unit != NULL)
|
|
printf("unit: %s\n", pe->unit);
|
|
if (pe->perpkg != NULL)
|
|
printf("perpkg: %s\n", pe->perpkg);
|
|
if (pe->metric_expr != NULL)
|
|
printf("metric_expr: %s\n", pe->metric_expr);
|
|
if (pe->metric_name != NULL)
|
|
printf("metric_name: %s\n", pe->metric_name);
|
|
if (pe->metric_group != NULL)
|
|
printf("metric_group: %s\n", pe->metric_group);
|
|
}
|
|
}
|
|
|
|
#if defined(__amd64__) || defined(__i386__)
|
|
static int
|
|
pmc_pmu_amd_pmcallocate(const char *event_name, struct pmc_op_pmcallocate *pm,
|
|
struct pmu_event_desc *ped)
|
|
{
|
|
struct pmc_md_amd_op_pmcallocate *amd;
|
|
const struct pmu_event *pe;
|
|
int idx = -1;
|
|
|
|
amd = &pm->pm_md.pm_amd;
|
|
if (ped->ped_umask > 0) {
|
|
pm->pm_caps |= PMC_CAP_QUALIFIER;
|
|
amd->pm_amd_config |= AMD_PMC_TO_UNITMASK(ped->ped_umask);
|
|
}
|
|
pm->pm_class = PMC_CLASS_K8;
|
|
pe = pmu_event_get(NULL, event_name, &idx);
|
|
|
|
if (strcmp("l3cache", pe->topic) == 0){
|
|
amd->pm_amd_config |= AMD_PMC_TO_EVENTMASK(ped->ped_event);
|
|
amd->pm_amd_sub_class = PMC_AMD_SUB_CLASS_L3_CACHE;
|
|
amd->pm_amd_config |= AMD_PMC_TO_L3SLICE(ped->ped_l3_slice);
|
|
amd->pm_amd_config |= AMD_PMC_TO_L3CORE(ped->ped_l3_thread);
|
|
}
|
|
else if (strcmp("data fabric", pe->topic) == 0){
|
|
|
|
amd->pm_amd_config |= AMD_PMC_TO_EVENTMASK_DF(ped->ped_event);
|
|
amd->pm_amd_sub_class = PMC_AMD_SUB_CLASS_DATA_FABRIC;
|
|
}
|
|
else{
|
|
amd->pm_amd_config |= AMD_PMC_TO_EVENTMASK(ped->ped_event);
|
|
amd->pm_amd_sub_class = PMC_AMD_SUB_CLASS_CORE;
|
|
if ((pm->pm_caps & (PMC_CAP_USER|PMC_CAP_SYSTEM)) == 0 ||
|
|
(pm->pm_caps & (PMC_CAP_USER|PMC_CAP_SYSTEM)) ==
|
|
(PMC_CAP_USER|PMC_CAP_SYSTEM))
|
|
amd->pm_amd_config |= (AMD_PMC_USR | AMD_PMC_OS);
|
|
else if (pm->pm_caps & PMC_CAP_USER)
|
|
amd->pm_amd_config |= AMD_PMC_USR;
|
|
else if (pm->pm_caps & PMC_CAP_SYSTEM)
|
|
amd->pm_amd_config |= AMD_PMC_OS;
|
|
if (ped->ped_edge)
|
|
amd->pm_amd_config |= AMD_PMC_EDGE;
|
|
if (ped->ped_inv)
|
|
amd->pm_amd_config |= AMD_PMC_INVERT;
|
|
if (pm->pm_caps & PMC_CAP_INTERRUPT)
|
|
amd->pm_amd_config |= AMD_PMC_INT;
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
pmc_pmu_intel_pmcallocate(const char *event_name, struct pmc_op_pmcallocate *pm,
|
|
struct pmu_event_desc *ped)
|
|
{
|
|
struct pmc_md_iap_op_pmcallocate *iap;
|
|
|
|
iap = &pm->pm_md.pm_iap;
|
|
if (strcasestr(event_name, "UNC_") == event_name ||
|
|
strcasestr(event_name, "uncore") != NULL) {
|
|
pm->pm_class = PMC_CLASS_UCP;
|
|
pm->pm_caps |= PMC_CAP_QUALIFIER;
|
|
} else if (ped->ped_event == 0x0) {
|
|
pm->pm_class = PMC_CLASS_IAF;
|
|
} else {
|
|
pm->pm_class = PMC_CLASS_IAP;
|
|
pm->pm_caps |= PMC_CAP_QUALIFIER;
|
|
}
|
|
iap->pm_iap_config |= IAP_EVSEL(ped->ped_event);
|
|
if (ped->ped_umask > 0)
|
|
iap->pm_iap_config |= IAP_UMASK(ped->ped_umask);
|
|
iap->pm_iap_config |= IAP_CMASK(ped->ped_cmask);
|
|
iap->pm_iap_rsp = ped->ped_offcore_rsp;
|
|
|
|
if ((pm->pm_caps & (PMC_CAP_USER|PMC_CAP_SYSTEM)) == 0 ||
|
|
(pm->pm_caps & (PMC_CAP_USER|PMC_CAP_SYSTEM)) ==
|
|
(PMC_CAP_USER|PMC_CAP_SYSTEM))
|
|
iap->pm_iap_config |= (IAP_USR | IAP_OS);
|
|
else if (pm->pm_caps & PMC_CAP_USER)
|
|
iap->pm_iap_config |= IAP_USR;
|
|
else if (pm->pm_caps & PMC_CAP_SYSTEM)
|
|
iap->pm_iap_config |= IAP_OS;
|
|
if (ped->ped_edge)
|
|
iap->pm_iap_config |= IAP_EDGE;
|
|
if (ped->ped_any)
|
|
iap->pm_iap_config |= IAP_ANY;
|
|
if (ped->ped_inv)
|
|
iap->pm_iap_config |= IAP_INV;
|
|
if (pm->pm_caps & PMC_CAP_INTERRUPT)
|
|
iap->pm_iap_config |= IAP_INT;
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
pmc_pmu_pmcallocate_md(const char *event_name, struct pmc_op_pmcallocate *pm)
|
|
{
|
|
const struct pmu_event *pe;
|
|
struct pmu_event_desc ped;
|
|
pmu_mfr_t mfr;
|
|
int idx = -1;
|
|
|
|
if ((mfr = pmu_events_mfr()) == PMU_INVALID)
|
|
return (ENOENT);
|
|
|
|
bzero(&pm->pm_md, sizeof(pm->pm_md));
|
|
pm->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
|
|
event_name = pmu_alias_get(event_name);
|
|
if ((pe = pmu_event_get(NULL, event_name, &idx)) == NULL)
|
|
return (ENOENT);
|
|
assert(idx >= 0);
|
|
pm->pm_ev = idx;
|
|
|
|
if (pe->event == NULL)
|
|
return (ENOENT);
|
|
if (pmu_parse_event(&ped, pe->event))
|
|
return (ENOENT);
|
|
|
|
if (mfr == PMU_INTEL)
|
|
return (pmc_pmu_intel_pmcallocate(event_name, pm, &ped));
|
|
else
|
|
return (pmc_pmu_amd_pmcallocate(event_name, pm, &ped));
|
|
}
|
|
|
|
#elif defined(__powerpc64__)
|
|
|
|
static int
|
|
pmc_pmu_pmcallocate_md(const char *event_name, struct pmc_op_pmcallocate *pm)
|
|
{
|
|
const struct pmu_event *pe;
|
|
struct pmu_event_desc ped;
|
|
int idx = -1;
|
|
|
|
bzero(&pm->pm_md, sizeof(pm->pm_md));
|
|
pm->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
|
|
event_name = pmu_alias_get(event_name);
|
|
|
|
if ((pe = pmu_event_get(NULL, event_name, &idx)) == NULL)
|
|
return (ENOENT);
|
|
if (pe->event == NULL)
|
|
return (ENOENT);
|
|
if (pmu_parse_event(&ped, pe->event))
|
|
return (ENOENT);
|
|
|
|
assert(ped.ped_event >= 0);
|
|
pm->pm_ev = idx;
|
|
pm->pm_md.pm_event = ped.ped_event;
|
|
pm->pm_class = PMC_CLASS_POWER8;
|
|
return (0);
|
|
}
|
|
|
|
#elif defined(__aarch64__)
|
|
|
|
static int
|
|
pmc_pmu_pmcallocate_md(const char *event_name, struct pmc_op_pmcallocate *pm)
|
|
{
|
|
const struct pmu_event *pe;
|
|
struct pmu_event_desc ped;
|
|
int idx = -1;
|
|
|
|
event_name = pmu_alias_get(event_name);
|
|
if ((pe = pmu_event_get(NULL, event_name, &idx)) == NULL)
|
|
return (ENOENT);
|
|
if (pe->event == NULL)
|
|
return (ENOENT);
|
|
if (pmu_parse_event(&ped, pe->event))
|
|
return (ENOENT);
|
|
|
|
assert(idx >= 0);
|
|
pm->pm_ev = idx;
|
|
pm->pm_md.pm_md_config = ped.ped_event;
|
|
pm->pm_class = PMC_CLASS_ARMV8;
|
|
pm->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
|
|
|
|
return (0);
|
|
}
|
|
|
|
#else
|
|
|
|
static int
|
|
pmc_pmu_pmcallocate_md(const char *e __unused, struct pmc_op_pmcallocate *p __unused)
|
|
{
|
|
return (EOPNOTSUPP);
|
|
}
|
|
#endif
|
|
|
|
int
|
|
pmc_pmu_pmcallocate(const char *event_name, struct pmc_op_pmcallocate *pm)
|
|
{
|
|
int error;
|
|
|
|
error = pmc_pmu_pmcallocate_md(event_name, pm);
|
|
if (error != 0) {
|
|
/* Reset any changes. */
|
|
pm->pm_ev = 0;
|
|
pm->pm_caps = 0;
|
|
pm->pm_class = 0;
|
|
|
|
return (error);
|
|
}
|
|
|
|
pm->pm_flags |= PMC_F_EV_PMU;
|
|
return (0);
|
|
}
|